Freescale Introduces Industry's Highest-Performance Fully Programmable Digital Signal Processor; New Quad-Core MSC8144 Based on Next-Generation StarCore(TM) Technology Delivers Performance Equivalent to a 4GHz Single-Core DSP

SAN JOSE, Calif.—(BUSINESS WIRE)—May 16, 2006— Freescale Semiconductor (NYSE: FSL) (NYSE: FSL.B) has introduced its third-generation multicore DSP based on next-generation SC3400 StarCore(TM) technology. The new MSC8144 DSP is engineered to deliver leading-edge performance, reduce system costs and significantly increase channel densities for next-generation wireline and wireless infrastructure applications providing voice, video and data services.

The MSC8144 provides an optimal DSP solution for wireline infrastructure applications, such as carrier-class trunking, enterprise VoIP media gateways and video conferencing servers. Wireless applications served by the MSC8144 include wireless voice transcoding and IP multimedia subsystem (IMS) gateways, video multi-point conferencing units, baseband cards for 3G, Super 3G and WiMax basestations, and Layer 2 processing in radio network controllers (RNCs).

"A prime example of network convergence is 'access anywhere' communications, enabled by IMS gateways," said Lynelle McKay, vice president and general manager of Freescale's Digital Systems Division. "The ability to adapt media sessions as users change locations and even devices while maintaining exceptional QoS for triple-play services is invaluable. The MSC8144 multicore DSP provides the processing performance and flexibility needed to deliver these converged network capabilities within a low power envelope."

Industry's Highest Performance Programmable DSP

The new MSC8144 takes single-chip DSP integration to a new level of sophistication. Combining four StarCore DSP cores at up to 1GHz each, the MSC8144 delivers the industry's highest Gigahertz performance, equivalent to a 4GHz single-core DSP. It integrates the industry's largest embedded memory at 10.5Mbytes in a single package, virtually eliminating the need to attach external memories while maintaining a highly competitive cost and power per channel.

"Freescale's MSC8144 aims at reaching optimal programmable DSP performance density with attention to low power per channel and low cost per channel," said Max Baron, Senior Editor & Principal Analyst, In-Stat. "These factors are becoming part of the silicon selection process for many large OEM's in these markets."

Advanced SC3400 Architecture Based on StarCore Technology

The enhanced, deeper pipeline SC3400 DSP core on which the MSC8144 DSP is based enables higher clock rates and adds new Single Instruction Multiple Data (SIMD) instructions, precise exception and branch prediction. The SC3400 core also supports improved specialized instructions for Viterbi and video algorithms that virtually double the performance of previous-generation StarCore DSPs. Each core is surrounded by a highly efficient 16Kbyte instruction cache, 32Kbyte data cache and an MMU (memory management unit) for memory and task protection, enabling development of highly robust software.

"We are very pleased that Freescale has selected the StarCore SC3400 architecture as the architecture of choice for their next-generation video and digital communications platforms," said Craig Trautman, sr. director of Sales and Marketing, StarCore LLC. "Freescale's multicore SC3400 implementation with the MSC8144 will pave the way for more effective multimedia and modem processing in next-generation systems."

Since the advanced SC3400 instructions are a superset of the current SC140 instructions, MSC8144 software is fully binary and assembly-code compatible with Freescale's existing portfolio of multi- and single-core DSPs based on StarCore technology. This compatibility enables customers to leverage their software investment.

High Data Bandwidth Architecture

The MSC8144 DSP's rich set of peripherals supports a very high I/O bandwidth, which is important to meeting current and future customer needs:

-- Dual Gigabit Ethernet interfaces support SGMII and RGMII, and a 16-bit UTOPIA interface provides ATM support

-- A dual-RISC core implementation of QUICC Engine(TM) technology enhances overall system performance by offloading performance-consuming communication tasks from the DSP cores

-- A 4X/1X Serial RapidIO interface delivers high throughput and robust packet transfer

-- 2048 TDM DS-0 channels handle connectivity to the PSTN networks

-- 10.5Mbytes internal memory offers the industry's largest embedded memory

-- An advanced DDR-I/II controller provides an interface to high-speed, industry-standard memories

-- A 66MHz, 32-bit PCI bus interface provides additional high-speed connectivity

"Freescale's integration of Serial RapidIO technology on the MSC8144 further validates the need for open, high-speed interfaces for the high level of connectivity needed in next-generation communications equipment," said Tom Cox, executive director of the RapidIO Trade Association. "The introduction of the MSC8144 exemplifies how Freescale continues to proliferate RapidIO technology throughout its processor portfolios."

Versatility, Consolidation and Reuse

The highly optimized, yet fully programmable architecture of the MSC8144 DSP provides unmatched densities for voice and video transcoding/transrating and data applications integrated in a full framework.

Meeting the industry need for consolidation and reuse, the MSC8144's versatility is underscored by its programmability, scalability and abundance of networking interfaces. This versatility allows OEMs to adapt to changing standards while using the same device, hardware platform and tools for multiple applications. The MSC8144 also enables OEMs to implement different software loads, resulting in significant savings on development and design of future-proof products.

Accelerated Time-to-Market

Freescale offers a full set of development tools and enablement software for the MSC8144 platform solution. The CodeWarrior(TM) integrated development environment (IDE) from Freescale is a highly comprehensive, widely used IDE that includes advanced optimizing C/C++ compilers, profiling tools, cycle and instruction accurate simulators, device drivers and operating systems. The tool set comes with a fully equipped hardware development platform and reference board design.

The OSEck(R) RTOS from Enea also supports the MSC8144, providing a fully pre-emptive, full-featured, compact real-time kernel optimized to provide the high performance and small memory footprint tuned to meet the specific requirements of DSP systems.

Because the MSC8144 DSP core is code-compatible with previous generations of Freescale's DSPs based on StarCore technology, existing customers can start development immediately. To help simplify development and speed time-to-market, OEMs can license optimized multimedia codecs and software frameworks from Freescale and from Freescale's third-party ecosystem partners.

Technology, Packaging and Availability

Based on Freescale's advanced 90nm silicon-on-insulator technology, the MSC8144 DSP is planned to be available in 1GHz and 800MHz versions in a 783 pin, 29 x 29 mm FC-PBGA (flip-chip plastic ball grid array) package. General sampling is planned for the third quarter of 2006. Suggested resale pricing in 10,000-unit quantities starts at $180 (USD).

About Freescale Semiconductor

Freescale Semiconductor, Inc. (NYSE: FSL) (NYSE: FSL.B) is a global leader in the design and manufacture of embedded semiconductors for the automotive, consumer, industrial, networking and wireless markets. Freescale became a publicly traded company in July 2004 after more than 50 years as part of Motorola, Inc. The company is based in Austin, Texas, and has design, research and development, manufacturing or sales operations in more than 30 countries. Freescale, a member of the S&P 500(R), is one of the world's largest semiconductor companies with 2005 sales of $5.8 billion (USD).
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