In October 2004 Synopsys announced an agreement to acquire Integrated Systems Engineering AG (ISE), a leader in Technology CAD (TCAD) software products and services. The net acquisition price of this Zurich based firm was $95 million plus an earnout potential of $20 million. At the time Synopsys said that TCAD tools are a critical part of an overall DFM solution as they precisely simulate advanced semiconductor processes down to the atomic level before they are put into production. This can reduce the number of test chips required to optimize and characterize a new semiconductor process, significantly shortening the time and cost to ramp up yield in leading-edge fabs. Combining the predictive capabilities of ISE's software with Synopsys' design tools will help Synopsys customers achieve the highest possible yields by tuning their designs to the precise characteristics of a particular process. Synopsis has been working to integrate ISE products with Synopsys' own TCAD offering. Wolfgang Fichtner, founder and former CEO of ISE, is now VP of Engineering and GM of TCAD at Synopsys. I had a chance for a sneak peak before the October 17th announcement of the merged product with Terry Ma, Director of Product Marketing for TCAD.
What can you tell me about the new product?
We are introducing a new generation integrated TCAD simulation tool suite called Sentaurus to be released October 17th. Back in November 2004 we acquired a company called ISE, a leader in the TCAD simulation world. Sentaurus is the result of our merger and integration of the two platforms, the existing Synopsys TCAD platform and the new ISE platform together to form one platform that will allow us not only to address the traditional whole TCAD area but also moving us down into manufacturing. We are working on some exciting tools that will move manufacturing knowledge into the design.
During the past 6 to 9 months we have integrated some of these best in class features from both of these tool sets into this new platform called Sentaurus, combining the advanced calibrated, the key word is calibrated, physical models with robust algorithms software implementation providing you with self-consistent 2D and 3D modeling capability. We have put all that into a single platform that allows you to simulate very accurately and at the same time gives you the predictive power of simulations to look at the process and device characteristics. This new platform along with new capabilities for doing TCAD for manufacturing sets a new standard for TCAD simulation.
When we talk about TCAD, Technology CAD, we are not only talking about deep submicron technology. We can actually use TCAD to simulate a lot of different types of devices. For example memory devices that look at programming and erasing characteristics, and power devices at the other extreme from CMOS. CMOS is very small scale but power devices can be large scale with smart power generation and stuff like that. We can also simulate RF and analog applications. A lot of companies are now looking at analog mixed signal types of designs so that they need to look at very small devices like CMOS and their analog content. In addition to that we can also simulate optoelectronics like lasers and LED and related things like CMOS image sensors that are being used for camera phones and digital cameras. A lot of companies nowadays are moving from charge coupled devices to CMOS image sensors because of the cost. They need to be able to characterize them and optimize them. We can see that Technology CAD is not just for very deep submicron technologies. TCAD allows you to look at a full spectrum of technologies that you might be looking at from a chip comparison viewpoint.
|Integrated TCAD Flow from Development to Manufacturing|
The traditional process and device simulation tools are the core of the Sentaurus TCAD suite. We can do both 2D and 3D process and device simulation. We have a product called Sentaurus Structure Editor that allows you to combine a geometric type of simulation and a numeric type of simulation so that you can do very efficient 3D process simulation. 3D process simulation is a very difficult problem to solve from the numeric standpoint because of all the moving boundaries. By combining the numerical simulation that capture the physics and the geometry simulation that creates a structure in an area that the physics is not that critical we can provide you a very efficient 3D tool flow in process simulation capabilities. All that is built around a work bench technology that allows you to manage your simulation runs especially when you have a large number of simulations that you want to do like design of experiments. This allows you to mange and visualize the results.
One of the key aspects of Technology CAD is that it allows you to look inside the device. What I mean by that is that in some cases measurements may not tell you the whole story. But if you can go in and look at a cross section for example where the current breakdown is occurring, where the current is flowing, and where you have the highest electric field in your device, now you can gain some knowledge about you device characteristics and then optimize it accordingly. A critical aspect of Technology Cad is that you are able to look at some of the phenomena and that you may not be able to see on an actual wafer or actual cross section of a device from all the metrology that you use in the manufacturing line. A critical aspect of simulation is to be able to look at the device characteristics and get more comprehensive knowledge of what you are dealing with.
TCAD simulations are very accurate and they give you predictive capability. Once you have captured all of the physics, the process parameters and your device characteristics, you can do a very large number of simulation runs like design of experiments and create the physical modeling capability allowing you to comprehend the process variations that can impact your design sensitivity like on drive current, leakage current that kind of parametric yield parameter that you can look at. That brings in the new capability that we have included in this new TCAD platform, Sentaurus DFM. This gives you manufacturing control in terms of allowing you to use what we call compact process models (CPM) to do sensitivity analysis and yield analysis. This will allow manufacturing engineers to improve the parametric yield by controlling the process and doing advanced process control.
In process simulation we model the implantation, diffusion and oxidation. These are fully calibrated with experimental results and equipment vendor data. That's why they are very predictive. You basically start from a full description and a layout through to full simulation. At this point you would run through the manufacturing line that starts in the fab and create the process structure. Once you have the process structure you can look at the electrical, optical, mechanical and magnetic behavior of the semiconductor devices. We can do static, time dependent, large and small signal, frequency dependent and large modeling; very comprehensive simulation capabilities.
In the integrated Sentaurus flow you describe the process just like you would do in a process recipe in a fab. You start with gate oxide on the substrate, poly gate deposition and then you go through your halo implants and all of that. You repeat all the processing steps until you get to the final structure including the CAT layers and all that. Once you have that information encapsulated in a process structure, then you can look at the electrical characteristics: threshold voltage, the leakage current, the drive current and so on and so forth.
Getting accurate and predictive results does not happen by accident. You need the advanced models that capture the physics and also calibrating that to equipment results and the measured data that we have coming from our partners on the equipment side. Also when you are doing a large number of simulations you need to have very robust algorithms. Looking at some of the new physics sometimes you need the flexibility to be able to customize the model and implant certain models to look at the new physics. This software implementation is important. This allows you to look at 2D and 3D modeling capability where you can truly comprehend what will happen when for example you have a narrow width effect or a short channel effect in your device.
What are some of the challenges that TCAD customers face today and how can TCAD mitigate these challenges?
Among the major challenges is the fact that the cost of production is rising, that technology complexity is increasing, that product lifecycles are decreasing and that process windows are shrinking.
It costs over $3B for a fab. When you run a 300 mm wafer through a production line it costs $20K. Anytime you can reduce the number of wafers you need to run in order to develop a process to meet the performance, you have a lot of savings by using the simulations rather than the actual wafers. Product development costs are going to be 3 times higher when you go from 90 nm to 65 nm and who knows how much more it will cost for 45 nm. If you look at the International Technology Roadmap for Semiconductors (ITRS) in 2004 there is a table that addresses the simulation and modeling aspects of technology development. According to this table you can save technology development costs up to 40% by 2006 when you use Technology CAD. A lot of our customers are taking advantage of TCAD in order to save the technology development costs. If you look at just a simple device the technology complexity is mind boggling, all the things you have to consider when you are looking at a new device or when someone passes you a performance spec for you to generate a chip. If you look at it, there are considerations of gate insulator, what kind of materials you should be using (high k or combined with silicon dioxide), what gate materials (poly or metal), how you can change the mobility in the channel for example by putting stress in the channel, how the doping can be activated, the cycle, stress coming from trench isolation, what kind of materials you should be using for substrate (silicon, silicon germanium or SOI) and so forth. It is not easy to come up with all these things when you start to develop a new technology or a new process. Simulation allows you to look at different combinations, different design alternatives and putting them together and seeing what works and what doesn't work.
It's not a mystery that product lifecycles are decreasing. In the mid nineties when you were six months late, you might lose 31% of potential earnings. Today if you are 3 months late, you may lose the entire market in some cases. It is not easy when you are looking at a developing new technology to satisfy the performance spec for 65 nm or 45 nm while facing the time to market constraints as well. On top of that you have to look at new technology or new process steps. You have to look at new materials that are being introduced. Since analog and mixed signal requirements impact the yield pretty strongly, you need to look for innovative and advanced process control methodologies. When you have a shrinking process window, when you have to look at process variability and when you find that you have a problem with your yield, imagine going back and telling the designer to change his mask. It's another iterated cycle time. It takes time. It's pretty costly. So people are looking at a new way of doing advanced process control. Basically to look at the process sensitivity of your parametric yield so that you can analyze the sensitivity, control your process variability and improve your parametric yield. This is the new aspect of control that allows you to use TCAD for manufacturing, encapsulating the process parameters, correlating that with your parametric parameters so that the manufacturing engineers can look at what would happen to your wafer and change some of the variables.
Terry shared with me an example of a fully depleted 20 nm FDSOI Mesa MOSFET. In this case one can use simulation is to explore how you can put the technology together, for example by introducing stress in the channel to increase the drive current. Through simulation one can look at many different types of formation of the gate trying to understand whether this technology will work and that it will meet the performance spec or not. In this particular case they were looking at the effect changing the germanium content in the source stream from 15% to 20%. They looked at different recess depths: 30 nm or 60 nm and then at the percent of underetching. They looked at where to introduce stress in the channel in order to increase mobility. They used simulation to optimize the performance looking at the stress before the pre-spacer flow and after pre-spacer flow. In measurement, you have to do that on wafers. It is pretty costly and it takes a long time to run these experiments compared to simulation which you can easily do in a very short time.
He described another example application of controlling the process variability in a manufacturing line. In this particular case they were looking at an example a gating seeding that is out of spec. Once you take the measurements, you have to define what you want to do with the wafers. Do you want to continue to process them or stop the process? Remember that every wafer costs $20k to run through the production line. In the old days, if you had one wafer, the process engineer would say that's fine, stop this wafer and don't process it any more. But if you have a lot of wafers, let's say five different batches of wafers that are out of spec, what do you do? Now you have a way to look ahead. If I change some of the process parameters like halo implant, if I change it to the high end of the spec will I be able to get the parametric parameters like on-current to be within spec? This is like a feed forward analysis. Instead of running wafers through the fab, now you have an instantaneous feedback on what will happen with these wafers if you change some of the process parameters down the road like implant energy so that you can save these wafers or not. It gives you a way to do advanced process control. Actually finishing these wafers will increase the number of good parts instead of slow parts. You can improve the yield that way.
Who uses Synopsys' TCAD offerings?
Our tools are being used by 19 out of the top 20 semiconductor firms. The other company has a lot of internal development on their own (you can probably guess which company it is). They are using some of our tools but not completely yet.
We have the industry's most experienced R&D and application teams. They can give you comprehensive knowledge about TCAD as well as the physics and numerical computation so that you can get very good simulation as well as the knowledge from our experts. We have a complementary consulting engineering service. For some customers to get started when they don't have enough resources to do the simulations or calibrations, we offer the service to help customers do that. We have a very strong R&D program with industry. As I mention the calibration aspect, the model parameters with equipment vendors as well as academia to look at the new physical models. We are not talking just about submicron technology. We are talking about being able to simulate power devices, optoelectronics and so on and so forth.
All of this is aimed at being able to reduce silicon runs, run time and technology development costs.
What is the packaging and pricing for Sentaurus?
It varies depending upon the package. Our lowest priced tool, a visualization package is priced at $5,000. Our highest priced tool is 3D process simulation and is priced at $125K. That's a pretty big range. Typically for full process and device simulation capability you are looking at maybe $100K.
Does the average customer buy one package, one package for every manufacturing engineer, ?
Typically when you look at technology development area which is where the core TCAD is being used, we are looking on the average at 5 to 10 packages, especially when you are doing a lot of simulation runs during the optimization phase.
Availability of Sentaurus? October 17th is the release date.
What about existing Synopsys TCAD users who might wish to migrate to Sentaurus?
We have a pretty comprehensive upgrade path for existing customers. One thing I want to make clear is that the upgrade is dependent upon the customer. We are not asking them to migrate right away. We are maintaining some of the legacy products in terms of development and all that. The 3D base and customer timeline where typically they are looking at new technology they might want to migrate right away. But if they are continuing with existing technology, they may continue to use our existing tools. It's really up to the customer. We will work with our customers to design a package that will allow them to migrate very easily.
Would it be fair to say, if you are going to continue to develop the legacy products that the chief benefit for existing customers moving forward is related to the technology you acquired form ISE?
Yes, especially it gives you the 3D capability when you are looking at some of the effects you cannot comprehend, that gives you that advantage as well as being able to take advantage of the latest technology, the software architecture, making it more flexible for you to use.
Who do you see as the chief competitor in the TCAD arena?
Before the ISE acquisition it was ISE. Now we see some Silvaco here and there working with some of our customers. They are trying to take market share. But our chief competitor is Silvaco at this point.
Editor: Silvaco was founded in 1984 by Dr. Ivan Pesic to meet the demanding requirements of analog IC designers for SPICE model accuracy and linearity. The initial product, UTMOST (Universal Transistor MOdeling SofTware) model extraction system was used for parameter extraction, device characterization and modeling. In 1989 Silvaco entered into the technology computer aided design (TCAD) market building upon the excellent research from the Stanford University Department of Device Physics. Silvaco offers the Athena process simulator product and ATLAS device simulation product. Since then the company has expanded inot SPICE and IC CAD markets. In 2002 they received $20 million in a legal settlement from Avant!. The privately held company employs about 200 people
What do you think Synopsys market share is?
One of the reasons it is so hard to come up with a share number is that our competitors are privately held companies. There is no public record of their revenue. Also if you look at some of the companies traditionally have had a large TCAD development team of their own. They are developing some of their own internal tools. It's hard to come up with a number that is universal, one that people will agree on. But I think on the safe side being used by 19 of the top 20 to say between 80% and 90%.
Is this the type of product that is best suited for the top 20? Any market growth potential or just maintain market share?
If you look at the top 20 companies, they are leading edge companies so they use a lot of TCAD simulations. Simulation is getting more and more into their flow. They are going to be using more simulation. If you look at 5 to 10 packages, they may increase this. In some cases our customers are using hundreds of licenses. They need that for many different technologies. The way this platform is designed allows you to address across platforms all the other technologies. For example companies like Toyota design some of their power devices. They use our software to do power design simulations even though they are not in the top 20. Any company that is dealing with semiconductor technology can take advantage of this package. It allows you to look at the full spectrum of technologies. So it is not just limited to the top 20 companies. The growth is really within these companies by increasing their use of TCAD. You can see in the ITS Roadmap, the cost reduction of 40% is not insignificant for technology development.
Are the major fabs (TSMC, UMC, Chartered) major customers of Synopsys TCAD?
Yes, they are all our customers.
The benefits increase as you go from 90 nm to 65 nm to 45 nm. There are a lot of new technologies in a number of different areas. How does Synopsys keep current and validate the accuracy of the simulation?
We work very closely with some of the equipment vendors. You might have seen some of the papers and announcements. We work with Applied Materials on the equipment side. At the same time we work with a lot of researchers in the field. If you look at our customer base we have a large number coming from academia, universities or research institutes. We give them low priced software. We get feedback from them about what is new, what works best, what is missing. When they are looking at the latest research we work very closely with them. We have a large development staff that is very knowledgeable about not just simulation but also the physics. Several of them are technologists, some are computer scientists. But they work very closely with researchers and equipment vendors so that we keep up-to-date with the latest development technologies.
Consider this analogy. In the aerospace industry you simulate the strength of materials. As the industry moved to the use of composite materials, the then existing simulation tools did not apply. They had to be fundamentally changed to take into account the new material types. In the semiconductor arena there are lots of changes in terms of devices, processes and materials. Keeping the simulation software current must be quite a challenge.
You are absolutely right. There are two approaches. One if you use existing models we allow the flexibility to input material properties into your simulation so that we can model it. In some cases you may not get the accuracy needed for people to do exploration. Sometimes they are only interested in qualitatively trends so they can see if this material combined with this kind of structure would work or not, whether for example it gives you a higher charge current or lower charge current. Qualitatively they can do that. The other approach that I forgot to mention to earlier and that this platform includes is Monte Carlo or particle type simulation for both process and device simulation. So now you can really go down to the fundamental physics, looking at the Monte Carlo simulation, looking at first principles. Seeing where the electron is hitting what lattice, what happens to this particular technology and this particular material? Monte Carlo simulation takes longer. Imagine that you have one doping going in there and it strikes silicon add-ons how much interaction it creates. Monte Carlo simulation tracks all that basically looking at first principles of your physics and getting that type of information. That is another type of modeling capability we have I this platform. Customers can look at new materials, new technologies even without a lot of the data available to them.
Are there any customer testimonials concerning Sentaurus?
Customers are not using Sentaurus because this is new. However, the technology it is based on has been endorsed by some customers. We have a couple of quotes from our customers. We don't quote everyone and not everyone wants to be quoted. We have a few customers that have been using Synopsys or ISE technology before and have validated that this technology using TCAD can really help them during product development as well as research by having these Synopsis and ISE best-in-class TCAD features put together in a single platform. We allow them to move forward and continue to use TCAD for their development work as well as using it for manufacturing control.
Editor: The October 17th press announcement cites Toshiba and Fairchild Semiconductor
How large a customer base did ISE have?
The number of customers was large. Going through the top 20, more than half were using ISE and the balance were using Synopsys as their main TCAD tool.
The top five articles over the last two weeks as determined by the number of readers were:
Syntest Receives "Multiple-capture DFT system for scan-based integrated circuits" Patent for At-Speed Scan/BIST InventionSynTest Technologies, Inc., was granted 33 claims under a US patent for its invention of at-speed testing of asynchronous multi-clock, multi-frequency designs, using ATPG or Logic BIST DFT schemes. The major benefit of this patented DFT scheme is the reduction in the number of ATPG patterns compared to the traditional one-hot DFT scheme for multi-clock, multi-frequency designs. The resultant compaction of 3x-10x translates directly into test cost savings.
Mentor Graphics Announces Third Quarter Results; Reaffirms 2005 and 2006 Guidance Mentor announced record revenue for a third quarter of $164.8 million. Earnings were break-even on a GAAP basis. For 2005, Mentor expects revenue of approximately $700 million and $755 million for 2006.
Asynchronous Circuits Transient Faults Sensitivity Evaluation - Technical Paper 151 The paper presents a transient faults sensitivity evaluation for Quasi Delay Insensitive (QDI) asynchronous circuits. The objective of this work is to evaluate the circuits robustness against natural faults (single fault model) and intentional fault injection (multiple faults model).
Kawasaki Microelectronics Adopts Apache's SoC Power Closure Design Flow 140 Kawasaki Microelectronics, Inc. will use Apache's RedHawk full-chip dynamic power solution in the design flow for ASIC designs at 130nm and below. Kawasaki selected RedHawk for its silicon-proven dynamic analysis of the power/ground network behavior and its ability to identify the impact of noise on timing and yield.
Synopsys Accused of Antitrust Violations in Magma Court Filing; Questions Validity of Synopsys Patents, Raises Question of Fraud 141 Magma claims that Synopsys' recent claims of patent infringement against Magma not only rely on patents that are invalid but also constitute a violation of United States antitrust law. Magama is disputing Synopsys' claims on the basis that the applications Synopsys made to the U.S. Patent and Trademark Office knowingly concealed relevant prior art that described the inventions claimed in the applications.
Other EDA News
Dynamic Abstraction Using SATbased - Technical Paper from DAC 2005
Cimmetry Announces Energy Industry Initiative at Documentum's Momentum Las Vegas 2005
Mentor Graphics Announces Third Quarter Results; Reaffirms 2005 and 2006 Guidance
Beyond Safety: Customized SAT-based Model Checking - Technical Paper from DAC 2005
Synopsys Accused of Antitrust Violations in Magma Court Filing; Questions Validity of Synopsys Patents, Raises Question of Fraud
StarGen Verifies Advanced Serial Switched Interconnect Chips With Synopsys' VCS, VERA and VCS Verification Library Solutions
Avertec Selects Jedat as its Distributor for Japan
BEOL Variability and Impact on RC Extraction - Technical Paper from DAC 2005
Cadence CEO Mike Fister to Deliver Keynote at In-Stat Fall Processor Forum
Cedar Point Utilizes Synopsys' VCS Native Testbench Technology to Speed Time to Market for Safari C(3) VoIP Switch
Celoxica's GM Moderates ESL Panel at GSPx
Resistive-Open Defect Injection in SRAM Core-Cell: Analysis and Comparison between 0.13 µm and 90 nm Technologies - Technical Paper from DAC 2005
Design Automation Conference Announces Call for Papers; EDA Industry's Premier Forum to be Held in San Francisco July 24 - 28, 2006
SynTest Receives "Multiple-capture DFT system for scan-based integrated circuits" Patent for At-Speed Scan/BIST Invention
QuasiStatic Assignment of Voltages and Optional Cycles for Maximizing Rewards in RealTime Systems with Energy Constraints - Technical Paper from DAC 2005 New Synfora PICO Express Interface to Mentor Graphics ModelSim Simulation Environment Available Now; Synfora Designated a ModelSim Value-Added Partner
Cadence Backs User Demand for Accelerating IEEE P1647 e Standardization; Working Group Completes Technical Portion of LRM Ahead of Schedule; Standardization Vote Expected in Fourth Quarter of 2005
Synopsys Extends TCAD Leadership With the Introduction of Sentaurus
Other IP & SoC News
TI Introduces 24-Bit Analog-to-Digital Converters for Bridge Sensor Applications
Chartered Reports Results for Third Quarter 2005; Fourth Quarter 2005 Revenues Expected to Increase Over 20 Percent Sequentially
Zarlink Releases Second Quarter Fiscal 2006 Results
Matrix Agrees to Acquisition by SanDisk
SanDisk Reports Record Quarter with Revenues Up 45% and EPS Up 90%
Synplicity Announces Record Revenue and Earnings for the Third Quarter 2005
Freescale Semiconductor Reports Third Quarter 2005 Results
Freescale Acquires CommASIC; Company Brings Ultra-Low Power Embedded Wi-Fi to Freescale's Connectivity Offerings
ON Semiconductor Reports Third Quarter 2005 Results; Revenue and Gross Margin Sequentially Up
TriQuint Semiconductor, Inc. Announces Revenue and Earnings Growth for the Quarter Ended September 30, 2005
Microchip Technology Announces Record Sales and Net Income for Second Quarter Fiscal Year 2006 and Record Quarterly Cash Dividend
Xilinx Announces September Quarter Results; EPS $0.24
MIPS Technologies Reports First Quarter Fiscal 2006 Financial Results
Broadcom Reports Third Quarter 2005 Results
Leadis Technology Reports Third Quarter 2005 Financial Results and Announces Volume Shipments of a-Si TFT Driver IC
California Micro Devices Reports September Quarter Financial Results
Micro Linear Announces Third Quarter 2005 Financial Results
TI Announces Volume Production of TMS320F28x(TM) Controllers with 64 Times Greater PWM resolution
Supertex Reports Second Fiscal Quarter Results
Texas Instruments Introduces New Radio Frequency Synthesizer for Wireless Infrastructure Applications
TI Unveils Single Chip Multi-Carrier Mixed Signal Processor for 3G Wireless Infrastructure Applications
Virage Logic and MIPS Technologies Accelerate Processor Performance With Core-Optimized IP Kits
Cypress Reports Third Quarter 2005 Results
Semtech Debuts SC310 Current Sense Amplifiers With Voltage Flexibility and Power Saving Features; Devices Feature Three Voltage Gain Options and Industry-Leading Accuracy for Mobile or Industrial Applications
White Electronic Designs Awarded Additional $1.6 Million Follow-on Contract for System-On-Chip Modules for Air-to-Air Missiles
TI Announces Programmable, Flexible Clock Multiplier that Delivers 3x Better Jitter Performance
QLogic Reports Second Quarter Results for Fiscal Year 2006; Record Revenue Level Achieved for Continuing Operations
Cirrus Logic Reports Fiscal Q2 2006 Financial Results; Revenue from Core Products Grows 11 Percent Sequentially
PMC-Sierra Reports Third Quarter 2005 Results
Intel Makes Multimedia Services Faster, Easier and More Affordable
Intel's Next-Generation Wi-Fi Solution to Support Cisco Compatible Extensions
CEVA Xpert-Teak DSP Subsystem Powers National Semiconductor's New CP3SP33 Telematics Chip Targeting Analog-Rich Automotive Multimedia Applications
Cypress Introduces World's First Industrial Grade High-Speed USB 2.0 Microcontroller; New Offering Supports Temperature Range of -40 Degrees C to +105 Degrees C for Industrial, Automotive and Military Applications
FSA Announces 2005 FSA Suppliers Expo Taiwan & Semiconductor Leaders Forum; Second Annual Event to Feature Four Keynote Presenters
Toshiba Expands White LED Driver Product Line With White LED Driver IC That Powers Up to 8 LEDs in Series
Broadcom Completes Acquisition of Athena Semiconductors, Inc.
TI Introduces High Accuracy, 4-20mA Transmitter for Industrial Sensors and Monitors
SafeNet Announces Security Processor for SME Networking Equipment; SafeXcel-5150 is the First Security Processor Purpose-Built for Fast Ethernet Bandwidth
AMI Semiconductor Launches World's Smallest Single-Chip Stepper Motor Driver-Controller ICs
National Semiconductor Samples Industry's Lowest-Wire-Count LVDS Chipset for Flat Panel Displays in Automotive, Industrial and Security Applications
North American Semiconductor Equipment Industry Posts September 2005 Book-to-Bill Ratio of 1.02
Linear Technology Reports Increased Sales and Pro Forma Profits Over The Similar Quarter In The Prior Year
Intel Announces Record Revenue of $9.96 Billion; EPS of 32 Cents Includes Legal Settlement that Lowered EPS by Approximately 2 Cents
Motorola Announces Record Third-Quarter Sales and Earnings
TI MSP430 MCU First to Break 500 Nano-amp Barrier Ember Ships Samples of ZigBee System-on-a-Chip; Combo 802.15.4 Radio and 16-Bit ZigBee Processor Chip Sends Packets More Than Twice as Far as Competitors
National Semiconductor Introduces Industry's First Average-Program Load-Share Controller
LSI Logic RapidChip(R) Technology Breaks $10 Barrier for Custom Single-Chip PCI Express Applications
Atmel's RF Tuner T4260 Supported by TI to Expand Developer Flexibility, and to Reduce Cost for HD Radio Receivers
Broadcom Expands Mobile Multimedia Processor Family
TI Introduces 50 Percent Smaller, Pb-Free, Boost and Buck-Boost Power Modules with Wide Output Voltage Range
Two New 16 Channel High Voltage Analog Switches From Supertex Deliver Improved Density and Performance
STMicroelectronics Delivers Single-Chip Power Management Solution for Notebook PCs and Portable Systems
IC Interconnect Announces New Wire-Bonding Process for High-Temperature Applications; Electroless Ni/Immersion Au Process Receives Positive Customer Reviews as a Wire Bond Surface after Rigorous Testing
SEQUANS Communications Announces Availability of Its First System-on-Chips for WiMAX Subscriber Stations and Base Stations
ChipX Announces New Structured ASIC Family with Embedded PCI Express PHY; Silicon-proven PCIe Subsystem Offers High Performance, Low Risk Alternative to Traditional ASIC, FPGA Options
Ziptronix Revolutionizes Chip Interconnect for Three-Dimensional Integrated Circuits; New technology spurs greater integration, higher performance, and a scalable methodology to enable more than 4 million connections between bonded chips
X-EMI Adds Quad and Octal PCI Express Clock Buffers to Product Portfolio, Hits Taiwanese Market at Intel Developers Forum
Linear Technology Announces New Line of Power Modules
Atheros Single-Chip Technology for PCI Express WLANs Debuts in Lighter, Faster, Feature-Rich Notebooks
NEC Electronics America Introduces MOSFET Devices With Super Low On Resistance
Altera Completes Rollout of Low-Cost Cyclone II FPGA Family
Boost Converter Family Drives More LEDs from Lower Input Voltages
Conexant Introduces ADSL2plus Chipset with Integrated Voice and Support for High-Speed USB 2.0 Peripherals; New Device Provides Migration Path to VDSL2 and Enables WLAN Performance Improvements
Agere Systems Announces Chipset Solution for Mainstream Mobile Phones Capable of Cinema-Quality Video and CD-Quality Sound