Xilinx Accelerates System Verification with Vivado Design Suite 2015.1

Release includes the Vivado Lab Edition, accelerated simulation flows, interactive CDC analysis, and advanced SDK system performance analysis

SAN JOSE, Calif., May 4, 2015 — (PRNewswire) — Xilinx, Inc. (NASDAQ: XLNX) today announced acceleration of system verification with the release of the Vivado® Design Suite 2015.1, featuring major productivity advances  for the development and deployment of  All Programmable FPGAs and SoCs. This release includes the Vivado Lab Edition, accelerated Vivado Simulator and third party simulation flows, interactive clock domain crossing (CDC) analysis, and advanced system performance analysis with the Xilinx® Software Development Kit (SDK).

Logo - http://photos.prnewswire.com/prnh/20020822/XLNXLOGO

New Vivado Lab Edition
The Vivado Lab Edition is a no-cost, lightweight programming and debug edition of the Vivado Design Suite. The Lab Edition includes the Vivado Device Programmer, Vivado Logic and Serial I/O Analyzer, as well as memory debug tools. It is intended for use in lab environments where the full-featured Vivado Design Suite is not required. The Vivado Lab Edition is 75 percent smaller than the complete Vivado Design Edition, which considerably reduces lab set-up time and system memory requirements. For design teams that require remote debug or programming over Ethernet, the Vivado Design Suite 2015.1 also provides a standalone hardware server, which is less than 1 percent of the complete Vivado Design Edition.

Vivado Simulator and Third Party Simulation Flows
The Vivado Design Suite 2015.1 also features advancements in the simulation flows that reduce the LogiCORE™ IP compile times by over 2x. As a result, overall simulation performance is 20 percent faster compared to previous releases. The release also includes fully-integrated simulation flows with Alliance Program members, Aldec, Cadence Design Systems, Mentor Graphics and Synopsys.

"Leveraging the Xilinx Vivado Tcl store infrastructure, Aldec now provides full integration for Riviera-PRO and Active-HDL within the Vivado Design Suite," said Dr. Stanley Hyduke, CEO of Aldec Inc. "This unique integration capability results in a fantastic ease of use advantage for our customers."

Interactive Clock Domain Crossing Analysis
Xilinx has also extended its advanced verification portfolio by offering an interactive CDC analysis capability. This feature improves productivity by enabling the debug of CDC issues earlier in the design, reducing expensive in-system debug cycles. Combined with the Vivado Design Suite's interactive timing analysis and cross-probing features, the CDC analysis capability provides powerful timing analysis and debug functionalities, accelerating time to market.

Xilinx Extends SDK with Advanced In-system Performance Analysis and Validation
To accelerate the development of the Zynq®-7000 All Programmable SoC, Xilinx has extended its system performance and analysis toolbox for bare metal and Linux applications. The Xilinx SDK now provides embedded software developers the ability to analyze the performance and the bandwidth of their SoC design, including key performance metrics for the processor subsystem (PS) as well as bandwidth analysis between the PS, the Programmable Logic (PL) and external memories. System modeling designs using AXI traffic generators are provided for the Zynq-7000 All Programmable SoC ZC702 and ZC706 evaluation boards.

The Vivado Design Suite 2015.1 is available now with support for Xilinx's 7 series FPGAs and SoCs and UltraScale™ devices. Download the Vivado Design Suite 2015.1 at www.xilinx.com/download. To learn more watch the What's New in Vivado 2015.1 QuickTake Video, sign up for training, and take advantage of the UltraFast Design Methodologies and Vivado Design Suite-based Targeted Reference Designs to jumpstart your productivity.

About Xilinx
Xilinx is the world's leading provider of All Programmable FPGAs, SoCs and 3D ICs. These industry-leading devices are coupled with a next-generation design environment and IP to serve a broad range of customer needs, from programmable logic to programmable systems integration. For more information, visit www.xilinx.com.


Copyright 2015 Xilinx, the Xilinx logo, Artix, ISE, Kintex, Spartan, Virtex, Zynq, Vivado, UltraFast and other designated brands included herein are trademarks of Xilinx in the United States and other countries. All other trademarks are the property of their respective owners.


Silvia E. Gianelli

(408) 626-4328



To view the original version on PR Newswire, visit: http://www.prnewswire.com/news-releases/xilinx-accelerates-system-verification-with-vivado-design-suite-20151-300072054.html

SOURCE Xilinx, Inc.

Xilinx, Inc.
Web: http://www.xilinx.com

Review Article Be the first to review this article
Autodesk - DelCAM

Jeff RoweJeff's MCAD Blogging
by Jeff Rowe
Bricsys Insights: ACAD to BCAD
Solidworks Product Designer for NASCENT Technology at Charlotte, NC
Developer-Support-Implementation Engineer for EDA Careers at San Francisco Area, CA
SYSTEMS INTEGRATOR for Palm Beach County Human Resources at West Palm Beach, FL
CAD/CAM Regional Account Manager (Pacific Northwest) for Vero Software Inc. at Seattle, WA
Upcoming Events
AI·GI·CRV Conference 2017 at Edmonton, Alberta Canada - May 16 - 19, 2017
Innorobo 2017 at Docks de Paris Paris France - May 16 - 18, 2017
Display Week 2017 at Los Angeles Convention Center 1201 S Figueroa St Los Angeles CA - May 21 - 26, 2017
LiveWorx Tech Conf 2017 at Boston MA - May 22 - 25, 2017

Internet Business Systems © 2017 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering EDACafe - Electronic Design Automation GISCafe - Geographical Information Services TechJobsCafe - Technical Jobs and Resumes ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy Advertise