Date: Tuesday, June 3, 2008
In this complimentary seminar you will see firsthand how the Cadence® high-speed PCB design flow addresses
the unprecedented challenges of designing the system interconnect of today’s complex designs. Discover how the
Cadence Allegro® system interconnect design platform enables you to manage high-speed constraints, identify and address
signal integrity issues throughout the entire design process.
The Allegro platform is the leading physical and
electrical constraint-driven PCB layout and interconnect system. With
a fully integrated design flow the Allegro platform contains everything needed to take a PCB design from concept to
production. Experience how a common database architecture, use model, and library offer fully scalable PCB design
solution giving you the ability to grow and expand as designs and design challenges increase in complexity.
This seminar will also feature EDA technologies that
augment the Cadence high-speed PCB design flow. Learn how to
manage high-speed properties, automate component placement, and integrate FPGAs into system level designs. Theevent will conclude with a special presentation on design verification when preparing designs for manufacturing.