WILSONVILLE, Ore. — (BUSINESS WIRE) — June 3, 2011 — Mentor Graphics Corporation (NASDAQ: MENT) today announced a cooperative effort with Tezzaron Semiconductor and MOSIS to provide IC designers with a way to economically develop and manufacture 3D-IC prototypes on multi-project wafers (MPWs). The process enables designs using tens of millions of through silicon vias (TSVs) with dimensions as small as 1.2 x 6 microns and a pitch of 2.4 microns, producing up to 300,000 vertical interconnects per square millimeter.
“Our collaboration allows firms to explore practical applications of true 3D-IC integration in a way that reduces risk and cost, while taking advantage of over a decade of experience in manufacturing 3D-ICs with high density TSVs,” said Robert Patti, CTO of Tezzaron Semiconductor.
“Adding Tezzaron’s offering to our Multi Project Wafer (MPW) services allows companies to test out 3D-IC concepts using the same provider and model they currently use for their standard semiconductors,” said Wes Hansford, director at MOSIS. “By coordinating resources and schedules, we can significantly reduce the effort and risk involved in getting the silicon-proven data required to make effective product roadmap decisions.”
“We’re working with Tezzaron and MOSIS to ensure that even at the prototype stage our customers will be able to access production-certified Calibre solutions to verify that their 3D-IC designs are manufacturable,” said Joseph Sawicki, vice president and general manager of the Design-to-Silicon Division at Mentor Graphics. “The Calibre solution uses foundry-certified PDKs from MOSIS wafer suppliers with extensions for MOSIS-Tezzaron 3D-IC designs.”
Customers can use the 3D-IC service to create proof-of-concept ICs that demonstrate the use of high-density TSVs in stacked die configurations for intelligent sensor, multi-core processor and many other applications. MOSIS manages MPW projects including reticle creation, fab reservations, final packaging and testing, and other logistics. Tezzaron enhances customer designs as required for successful 3D-IC integration and also provides backend manufacturing steps including wafer thinning, backside metal and wafer bonding. Mentor provides DRC and LVS tools that support 3D-IC physical verification, ensuring that designs are correct and will meet 3D process requirements.
For more information about the 3D-IC prototyping service, please go to the MOSIS web site at www.mosis.com.
Tezzaron® Semiconductor specializes in 3D wafer stacking, TSV processes, and cutting-edge memory products. In 2004, Tezzaron demonstrated the world’s first successful 3D-ICs with TSV, including microprocessors, sensors, and SRAM devices. Tezzaron was founded in 1999 and maintains its headquarters at 1415 Bond Street, Suite 111, Naperville, IL 60563 ( www.tezzaron.com).
MOSIS is a low-cost prototyping and small-volume production service for VLSI circuit development. Since 1981, MOSIS has fabricated more than 50,000 circuit designs for commercial firms, government agencies, and research and educational institutions around the world.
About Mentor Graphics
Mentor Graphics Corporation (NASDAQ: MENT) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world’s most successful electronic, semiconductor and systems companies. Established in 1981, the company reported revenues over the last 12 months of about $915 million. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777. World Wide Web site: http://www.mentor.com/.
(Mentor Graphics and Calibre are registered trademarks of Mentor Graphics Corporation. All other company or product names are the registered trademarks or trademarks of their respective owners.)