Virage Logic Continues to Broaden Semiconductor IP Offering with New Portfolio of SoC Infrastructure Solutions

Integra™ SoC Infrastructure Solutions Provide Physical Design Friendly Technology with Embedded Quality of Service

TAIPEI, Taiwan — (BUSINESS WIRE) — July 27, 2010SOC SUMMIT

Virage Logic Corporation (NASDAQ: VIRL), the semiconductor industry's trusted IP partner, today announced the further broadening of its already extensive System-on-Chip (SoC) infrastructure IP portfolio with its new Integra product line. Based on the proven technology that Virage Logic acquired from NXP in November 2009, the Integra portfolio of SoC Infrastructure IP includes advanced Multi-layer and Control networks, embedded Quality of Service (QoS) functionality as well as memory controllers for embedded SRAMs/ROMs. This complete solution is able to provide the central back-bone of any SoC and extends Virage Logic’s ability to serve as a single source provider of highly differentiated, production proven IP.

"The Integra SoC Infrastructure IP portfolio was designed to be high performance and cost effective, and therefore is ideally suited for any application in today’s world of internet-enabled programmable multi-core devices,” said Henk Hamoen, director of marketing for SoC Infrastructure at Virage Logic. “Integra addresses the global drive for energy conservation by applying a power islands methodology; a technology that at the same time improves time-to-market because its implementation is extremely physical design friendly. Production proven innovative data and control interconnect networks as well as memory controllers for embedded SRAMs/ROMs are provided. The QoS Engine also provides unique system Quality of Service features that enable perfect media streaming in complex multi-media SoCs including Digital TV, Set Top Boxes and portable audio/video devices."

The Integra™ Multi-Layer and Control Networks connect with Virage Logic’s ARC® processor family via industry standard AMBA™ interfaces and provide an easy hook-up to the recently introduced portfolio of Processor Peripherals. The Integra™ QoS Engine also easily interfaces to the company’s Intelli™ DDR controllers, while the Integra™ Memory Controllers are optimized for use with Virage Logic’s SiWare™ Memory embedded SRAM/ROM memories.

In addition, because the Integra product portfolio ideally fits the needs of market segments where Virage Logic is already a leading supplier, including Automotive, Microprocessors, Digital TV, Set Top Box and Multi-Media devices, customers benefit from the convenience of being able to rely on a single trusted IP provider for complete IP subsystems.

About Virage Logic’s Integra Product Portfolio

Virage Logic’s Integra portfolio includes:

• Integra™ Multi-layer Network – providing a flexible SoC interconnect with physical design friendly links for lower power and shorter time to-market

• Integra™ Control Network – delivering higher system performances with facilities for secure access

• Integra™ QoS Engine – delivering QoS guarantees for predictable system performance

• Integra™ Memory Controllers for embedded SRAMs/ROMs – providing an integral solution with the company’s SiWare Memory compilers


The Integra product portfolio is available today for early adopters and will be available for general distribution in September 2010. For information on licensing terms and pricing, please contact your local Virage Logic sales representative.

About Virage Logic

Virage Logic is a leading provider of semiconductor intellectual property (IP) for the design of complex integrated circuits. The company's highly differentiated product portfolio includes processor solutions, SoC infrastructure solutions, analog solutions, interface IP solutions, embedded SRAMs and NVMs, embedded test and yield optimization solutions, logic libraries, and memory development software. As the semiconductor industry's trusted IP partner, more than 400 foundry, IDM and fabless customers rely on Virage Logic to achieve higher performance, lower power, higher density and optimal yield, as well as shorten time-to-market and time-to-volume. For further information, visit

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