Tanner EDA, a leading provider of analog, mixed-signal (A/MS) and MEMS circuit design software, is exhibiting at the Electronic Design and Solution Fair ( EDSFair 2010) in Yokohama, Japan. The exhibit and demonstrations focus on the benefits of the HiPer Silicon software suite for A/MS design. The latest release of HiPer Silicon includes new features for increased productivity and interoperability while delivering on Tanner's commitment to low Total Cost of Ownership (TCO).
HiPer Silicon is Tanner EDA's hallmark software suite for the design, layout and verification of A/MS, RF and MEMS ICs. It includes core functionality for schematic capture, analog circuit simulation and physical layout, and features that improve designer productivity; like the HiPer Verify foundry-compatible physical verification engine, Verilog-A simulation, an interactive autorouter and device layout automation software.
When/Where: Thursday and Friday, January 28-29, 2010 Booth 400 Pacifico, Yokohama, Japan
Information and Registration
To arrange an appointment or demonstration, please email Email Contact.
About Tanner EDA
Tanner EDA is a global provider of electronic design automation (EDA) software solutions for the design, layout and verification of analog and mixed-signal ICs and MEMS. The low learning curve, high interoperability and powerful user interface of Tanner EDA's tool suite promotes innovation and speeds designs from concept to silicon. Tanner EDA software is used by thousands of designers for applications including Power Management, Displays and Imaging, Automotive, Consumer Electronics, Life Sciences, and RF. Tanner EDA has shipped over 33,000 licenses of its software to more than 5,000 customers in 67 countries. For more information on Tanner EDA products, visit www.tannereda.com.
HiPer Verify and HiPer Silicon are trademarks of Tanner Research, Inc. All other trademarks and tradenames are the property of their respective owners.
Press Contact: Georgia Marszalek ValleyPR +1 650 345 7477 Email Contact