Cadence Announces That STMicroelectronics Adopts Encounter Signoff Solutions for Designs From 65 to 32 Nanometers

SAN JOSE, CA -- (MARKET WIRE) -- Jul 27, 2009 -- Cadence Design Systems, Inc. (NASDAQ: CDNS), the leader in global electronic design innovation, today announced that STMicroelectronics, a global leader in integrated circuits for communications, consumer, computer, automotive and industrial applications, has adopted the complete Cadence integrated signoff solutions consisting of QRC Extraction and Encounter Timing System, for 65- and 45-nanometer design, and is actively qualifying the system for 32 nanometer process technologies. The Cadence signoff suite delivers a seamless integration of all the analysis components in a single cockpit, and with the complete Encounter implementation design flow. This approach to integrated signoff provides fast convergence, predictable design closure, and completely scalable multi-CPU backplane to enable overall cycle time reduction.

"At 65- to 45-nanometer process nodes, signoff solutions need to deliver accurate silicon predictability, high performance and integration with digital implementation flows to meet our time-to-market," said Philippe Magarshack, group vice president and general manager, Central CAD and Design Solutions, Technology R&D, STMicroelectronics. "Cadence's signoff combination of QRC Extraction and Encounter Timing solution demonstrated excellent design convergence which met our stringent accuracy specifications for our complex designs. This gave us the confidence to further extend qualification to our most advanced 32-nanometer projects."

The 65- and 45-nm flow qualification included rigorous evaluations involving multiple criteria and various design styles.

"Adopting Cadence's QRC Extraction and Encounter Timing System for our design teams and customers was the natural choice for ST given our successes with the tool at advanced nodes," said Thierry Bauchon, R&D Director, Home Entertainment and Displays Group, STMicroelectronics. "The Cadence integrated signoff suite delivers significant advantages in runtime and accuracy, and facilitates a seamless design flow through integration with Encounter Digital Implementation System."

"STMicroelectronics and Cadence have worked closely and successfully together to solve the industry's most complex challenges over the years. Our vision to integrate production-proven signoff technologies directly with our design implementation solution is an industry first and a great technology advancement to address design closure challenges with advanced process nodes," said Dr. Chi-Ping Hsu, senior vice president of Implementation Products at Cadence. "We are pleased that the Cadence integrated signoff technology delivered superior results for ST's most advanced technologies and designs, and we look forward to continuing our close partnership to deliver new breakthroughs for STMicroelectronics and Cadence."

About Cadence

Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software and hardware, methodologies, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at www.cadence.com.

Cadence is a registered trademarks and the Cadence logo is a trademark of Cadence Design Systems, Inc. in the United States and other countries. All other trademarks are the property of their respective owners.

Add to Digg Bookmark with del.icio.us Add to Newsvine

For more information, please contact:
Dan Holden
Cadence Design Systems, Inc.
408-944-7457

Email Contact





Review Article Be the first to review this article
Rand3D

Autodesk University 2017

Featured Video
MCAD Corporate Newsletter
rss feed
Editorial
Jeff RoweJeff's MCAD Blogging
by Jeff Rowe
NVIDIA’s AI Computer Drives AVs
Jobs
Mechanical Engineer for The Planate Management Group LLC at Perry Point, MD
Senior Mechanical Engineer for Albert Kahn and Associates at Detroit, MI
GIS Analyst for G2 Partners LLC at San Ramon, CA
ENVIRONMENTAL GRAPHIC DESIGNER for Blitz at San Francisco, CA
Structural Engineer for Albert Kahn and Associates at Detroit, MI
Upcoming Events
ASSESS 2017 CONGRESS at Bolger Center Potomac MD - Nov 1 - 3, 2017
FABTECH 2017 at McCormick Place Chicago IL - Nov 6 - 9, 2017
ATX MINNEAPOLIS 2017 at Minneapolis MN - Nov 8 - 9, 2017
2017 China Chongqing International Machine Tool Show (CCIMT) at Chongqing International Expo Center, Yubei Chongqing China - Nov 13 - 16, 2017



Internet Business Systems © 2017 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering EDACafe - Electronic Design Automation GISCafe - Geographical Information Services TechJobsCafe - Technical Jobs and Resumes ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise