Standard cells are the basic building blocks of System-on-Chip (SoC) designs. If the standard cell libraries are incorrectly characterized or inappropriately applied at new PVTs, the accuracy of the entire SoC designs could be at risk. Model Diagnoser has been designed to diagnose the .lib models of cell libraries, and to identify "functional failures" and "easy-to-break parts”. Model Diagnoser can analyze inside-cell, measure the detailed simulation results, and report the problems quantitatively. Frequently, those problems are caused by incorrect characterization.
"Legend’s Model Diagnoser can help locate the functional issues in the .lib models of TSMC 90nm and 65nm standard cell libraries. We are satisfied with the tool results, and continue to work with Legend to ensure our library quality for advanced nanometer technologies," said Tom Quan, deputy director of design service marketing at TSMC.
By using Legend’s patented SpiceCut technology, Model Diagnoser can locate high-risk spots inside the cell. Based on cell functions and conditions, Model Diagnoser extracts the applicable state patterns exhaustively. All setup time, hold time and minimum pulse width from the .lib model are validated against the simulation results. Not only the functional violations, but also signal integrity issues such as glitches and meta-stability can be precisely identified. In addition, Model Diagnoser can repair the problematic .lib model, by automatically adjusting the margins to ensure no functional violations and/or no signal integrity issues.
"Quality of standard cell libraries is critical for fist-pass silicon success of SoC designs." said Dr. You-Pang Wei, president and CEO of Legend Design Technology, Inc. "With the selection of Legend’s Model Diagnoser, TSMC has access to a premier solution for ensuring the quality of standard cell libraries. We are pleased to work closely with TSMC in meeting their needs of high quality libraries for supporting customers’ SoC designs.”
Legend Design Technology Inc. is a leading provider of circuit simulation and semiconductor IP library characterization software for SoC designs. With an emphasis on productivity and value, Legend’s library characterization toolset, CharFlo-Memory! for memory IP and CharFlo-Cell! for standard cell and I/O library, revolutionize the time-consuming and error-prone characterization processes. Model Diagnoser is for quality assurance and defect repairing for cell library.
MSIM is Legend’s high-accuracy SPICE circuit simulator with fast speed and great convergence. Turbo-MSIM is Legend’s full-chip Fast-Spice simulator ideal for timing and power simulation, and mixed-signal circuit verification. Both simulators are well designed for advanced nanometer technology and excellent price-performance. For more information, visit www.LegendDesign.com.
Legend Design Technology Inc.
Jane Wei, 408-748-8888 x234