“These new, advanced debugging features added to existing capabilities make our fast emulation systems the new standard for hardware design debugging,” says Lauro Rizzatti, EVE-USA’s general manager and vice president of marketing. “Already the choice for hardware/software integration for its superior speed, attractive pricing and full transactional-level support, the new functionality strengthens ZeBu’s standing as the ideal hardware-assisted design verification tool.”
Embedded and bound synthesizable SystemVerilog Assertions are supported in ZeBu emulation using EVE’s recently unveiled zFAST (ZeBu FAst SynThesis) tool. Similarly to ZEMI3, SystemVerilog Assertions improve the debugging process by accelerating the location of bugs and by minimizing the size of waveform files needed to isolate the bug.
Synthesizable assertions can be compiled into the emulator with a scope at the design, module, instance and assertion level. Assertion failures, starts and ends, and successes can be reported live or via post-processing in any mode of operation for every assertion in the register transfer level (RTL) code.
In addition to static probes and dynamic probes, the newly developed flexible probes offer broad visibility into the design, while increasing performance. Added during design compilation, the maximum number for flexible probes is higher — more than 30,000 per field programmable gate array (FPGA) — than for static probes. Flexible probes don’t affect emulation performance when they are disabled. When enabled, they generate signal waveform files at the maximum speed offered by the fastest host PC hard disk without limiting the number of cycles or stopping the emulator. Because flexible probes are fully integrated into zRun and the ZeBu C++/C application programming interface (API), system-on-chip (SoC) designers can use them in any mode of operation.
Run-time signal access and dynamic probing in ZeBu have been enhanced with the addition of simulated combinational signals that enable waveform generation of any RTL signal without adding extra logic into the design. Enhanced dynamic probes are integrated into the ZeBu run-time environment to generate a single waveform file and can be accessed interchangeably by software testbenches, providing improved debug capabilities.
Pricing and Availability
SystemVerilog Assertions, flexible probes and simulated combinational signals are available now at no cost as add-on features to ZeBu.
To learn more, visit: www.eve-team.com/products/zebu-debug.php.
EVE is the worldwide leader in hardware/software co-verification solutions, including hardware description language (HDL) acceleration and extremely fast emulation. EVE products significantly shorten the overall verification cycle of complex integrated circuits and electronic systems designs. Its products also work in conjunction with popular Verilog, SystemVerilog, and VHDL-based software simulators from Synopsys, Cadence Design Systems and Mentor Graphics. Its United States headquarters are in Santa Clara, Calif. Telephone: (408) 457-3200. Facsimile: (408) 457-3299. Corporate headquarters are in Palaiseau, France. Telephone: (33) 1 126.96.36.199. Fax: (33) 1 188.8.131.52. Email: Email Contact. Website: www.eve-team.com.
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