Berkeley Design Automation, Inc.
Conference Exhibit. Berkeley Design Automation will highlight how its Analog FastSPICE™ circuit simulator and Noise Analysis Option™ are solving big analog/RF verification problems that would be otherwise impractical or infeasible. WHERE: EDS Fair 2009 Booth #706. Pacifico Yokohama Exhibition Hall, 1-1-1 Minato Mirai, Nishi-ku, Yokohama 220-0012, Japan.
Thursday, January 22 & Friday, January 23, 2009, 10:00AM to 6:00PM (A seminar will be held at 10:30AM on Friday, 23 January 2009 - room DM2)
For more information about EDSFair2009, please visit http://www.edsfair.com/e/.
About Berkeley Design Automation
Berkeley Design Automation, Inc. is the recognized leader in advanced analog/RF verification. Its Precision Circuit Analysis technology combines the accuracy, performance, and capacity needed to verify GHz designs in nanometer-scale silicon. Berkeley Design Automation has received numerous awards including EDN Magazine's 2006 Innovation of the Year, the 2006 Red Herring 100 North America, and the 2007 Red Herring Global 100 Finalist. Founded in 2003, the company is funded by Woodside Fund, Bessemer Venture Partners, Panasonic Corporation (formerly Matsushita Electric Industrial Co. Ltd.), and NTT Corporation. For more information, see http://www.berkeley-da.com.
Analog FastSPICE, Noise Analysis Option, RF FastSPICE, PLL Noise Analyzer, WaveCrave, and Precision Circuit Analysis are trademarks and Berkeley Design is a registered trademark of Berkeley Design Automation, Inc. Any other trademarks or trade names mentioned are the property of their respective owners.
PR for Berkeley Design Automation - Cayenne Communication LLC
Michelle Clancy, 252-940-0981, Email Contact