“The DAC User Track provides a new forum through which EDA tool users can exchange information and best practices at DAC,” said Andrew Kahng, General Chair, 46th DAC Executive Committee. “We are excited to see so many leaders in the EDA user community engaging as members of the program committee that will define the User Track. We look forward to high-quality submissions and, ultimately, valuable user-focused sessions next July in San Francisco.”
Submission deadlines for other parts of the 46th DAC program are as follows: Special session, panel and tutorial proposals are due Nov. 3; submissions for the Student Design Contest are due Dec. 8; and paper submissions for regular and WACI (Wild and Crazy Ideas) sessions are due Dec.19. To see the full Call for Papers or for more details about DAC, visit: www.dac.com.
Submitting Extended Abstracts to the DAC User Track
Unlike the juried technical paper submission process for regular DAC papers, the submission process for the User Track simply requires developing an extended abstract: a two-page overview of the key challenges, innovations and results. After the submissions are reviewed, selected authors will be required to provide only a detailed presentation – technical papers will not be required for this track.
User Track abstract submissions will be reviewed by a technical program committee comprised of industrial end-users with expertise covering a large range of semiconductor products, design methodologies and tool use. Members of this committee include:
Nitin Chawla, Senior Member of Technical Staff, STMicroelectronics;
Kyu-Myung Choi, Vice President, CAE, System LSI Division, Samsung;
Sorin Dobre, Senior Staff Engineer, Qualcomm CDMA Technologies;
Toshio Fujisawa, Senior Specialist, Toshiba;
Bryan Heard, Director of Design Methodology, QThink;
Matt Moore, Raleigh ASIC Design Center Manager, IBM;
Uwe Muller, R&D Memory Products, Infineon;
Peter Nord, Project Leader, Business Unit Multimedia, Ericsson AB;
David Peterman, Manager, Wireless Terminals Business Unit EDA, TI;
Doug Quist, Director of Engineering, NVIDIA;
Alicia Strang, Staff Engineer, Enterprise Storage SoC Group, Marvell Semiconductor;
and Raj Varada, Principal Engineer, Intel.
The Design Automation Conference (DAC) is recognized as the premier event for the design of electronic circuits and systems, and for Electronic Design Automation (EDA) and silicon solutions. A diverse worldwide community representing more than 1,500 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities. Close to 60 technical sessions selected by a committee of electronic design experts offer information on recent developments and trends, management practices and new products, methodologies and technologies. A highlight of DAC is its Exhibition and Suite area with approximately 200 of the leading and emerging EDA, silicon and IP providers. The conference is sponsored by the Association for Computing Machinery’s Special Interest Group on Design Automation (ACM/SIGDA), the Circuits and Systems Society and Council on Electronic Design Automation of the Institute of Electrical and Electronics Engineers (IEEE/CASS/CEDA) and the Electronic Design Automation Consortium (EDA Consortium). More details are available at: www.dac.com.
Design Automation Conference acknowledges trademarks or registered trademarks of other organizations for their respective products and services.
Emily Taylor, 503-552-3733