Toshiba Starts Sample Shipping of SpursEngine(TM) SE1000 High-Performance Stream Processor

Offering Development Environment to Advance Stream Processing Applications In the Full-HD Era

TOKYO, April 8, 2008 /PRNewswire/ -- Toshiba Corporation today announced the start of sample shipping of the SpursEngine(TM) SE1000 (SpursEngine), a high-performance stream processor integrating four Synergistic Processing Element (SPE) cores derived from the "Cell Broadband Engine(TM)" (Cell/B.E.(TM)). Sample shipping began today and Toshiba expects sales of 6 million units within the first three years of the SpursEngine's release.

SpursEngine is a co-processor that integrates a hardware codec for full HD encoding and decoding of MPEG-2 and H.264 streams with four SPEs derived from Cell/B.E. These advanced processing elements offer high performance media streaming capabilities, with a clock frequency of 1.5GHz, while achieving a low power consumption range of 10W to 20W.

"We are very pleased to have started sample shipping of the SpursEngine," said Yoshio Masubuchi, Director of Toshiba's System LSI Division, Advanced SoC Development Center. "The design of this powerful co-processor is dedicated to bringing the advanced capabilities of the Cell/B.E. to consumer electronics, particularly video processing in digital consumer products. We are sure that SpursEngine will accelerate the market for full-HD applications."

Toshiba will support developers working on SpursEngine applications with a comprehensive reference kit that includes a reference board and essential middleware APIs. The reference board has a PCI-Express edge connector that can connect to an x1 layer slot in a PC. Toshiba will also provide an integrated development environment (SPE compiler, SPE debugger and performance monitor) and sample applications that demonstrate how to use the provided middleware. With the reference kit, customers can quickly and easily construct an evaluation and development environment and accelerate product development.

Toshiba will further boost the performance and cut the power consumption of the SpursEngine to support further innovation in products offering new levels of functionality.

Co-operation between Toshiba and the SpursEngine(TM) SE1000 Partnerships

Toshiba is developing co-operative relationships with many partner companies in order to develop wide scope video solutions that utilize the SpursEngine. For example, Toshiba is partnering with Corel Corporation, whose headquarters are in Canada, and Taiwan-based CyberLink Corporation and Leadtek Research Inc. These companies produce popular video and image processing software and hardware, such as graphic boards, and will together supply to set manufacturers. By working together with these companies and creating a new value chain, many end users can enjoy a comfortable digital life by using partner boards and software bundled with the SpursEngine.

    Outline of SpursEngine(TM) SE1000

    Product Number        BXA32110XBGN
    Sample Shipping       April 2008
    Processor             SPE 4 core
    SPE                   Fully compliant with Cell/B.E.(TM) SPE Instruction
                          Set SIMD RISC/Single & double -precision
                          floating-point arithmetic /DMAC/MMU
    Memory Interface      (XDR(TM) DRAM) 128MB(512Mbit x2), Physical
                          Bandwidth of 12.8GB/s
    Hardware Video Codec  Full HD Capable MPEG2 Encoder and Decoder
                          Full HD Capable H.264 Encoder and Decoder
    PCI-Express I/F       x1, x4
                          PCI-Express Compliant with Base Specification

    Outline of SpursEngine(TM) Reference Kit

                  Product Name         SpursEngine SE1000 Reference Kit
                     Model                    BXK005000

                  Main Engine          Processing          Maximum 48GFlops
                  SpursEngine SE1000   Performance         12GFlops/1SPE

                                       Element Core        SPEx4
                                       Operating Frequency 1.5GHz
                                       Registers           128bit x 128/1SPE

   Hardware                            Internal Memory     Local Storage
                  Host Interface                           1 lane link support
                                       Functions           Compliant Base
                  PCI-Express                              specification,
                                                           Revision 1.1
                  Memory               Physical Bandwidth  12.8GB/s
                    XDR(TM)DRAM                    Memory  Size                  128MB

                                Basic  software,  libraries  and  tool  chain  for  host  and
        Software        SPE  program  development.
                                Sample  applications  for  user  programs.

        *    XDR(TM)  DRAM  is  a  trademark  of  Rambus  Inc.  in  the  United  States  and
              other  countries.
        *    SpursEngine(TM)  and  the  logo  are  trademarks  of  Toshiba  Corporation.
        *    Cell  Broadband  Engine(TM)  and  Cell/B.E.(TM)  are  trademarks  of  Sony
              Computer  Entertainment  Inc.

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