Who: As the provider of the broadest line of controller, CPU and specialty DSP processors on the market today, Tensilica, Inc. is recognized as an industry leader with its low-power, benchmark proven processors. Dr. Jagesh Sanghavi, engineering manager at Tensilica, will preview the company's new Xtensa Energy Xplorer in his presentation "Energy Estimator for Extensible Processor Platform." The presentation will detail how the tool can be applied for early power analysis when customizing an extensible processor, describe the implementation details and modeling methodology, and discuss cover experimental results and error analysis. What: The theme for In-Stat's annual Spring Processor Forum 2006 is power-efficient design. Technical presentations from leading companies and innovative start-ups will show how the industry's best engineers are designing powerful single- and multi-core processors without busting their power budgets. The event will also tackle the power-efficiency problem at the system level, with presentations geared for system designers as well as chip developers. When: Dr. Jagesh Sanghavi will present on Tuesday, May 16, 2006, at 4:00 p.m. The Spring Processor Forum takes place May 15-17. Tensilica will also host a booth at the vendor fair Tuesday evening from 5:00-8:00 p.m. Where: The In-Stat Spring Processor Forum takes place at the Doubletree Hotel in San Jose, California. For more information, visit www.in-stat.com/spf
About Dr. Jagesh Sanghavi
Dr. Jagesh Sanghavi is engineering manager at Tensilica, Inc. where his current projects include predicting and characterizing the speed, power, and area for configurable and extensible processors. Before joining Tensilica, Dr. Sanghavi held various technical and management positions at Conexant, Cadence Design Systems and AT&T. Dr. Sanghavi received his B. Tech. from Indian Institute of Technology in Bombay and his M.S. and Ph.D. from the University of California at Berkeley.
Tensilica offers the broadest line of controller, CPU and specialty DSP processors on the market today, in both an off-the-shelf format via the Diamond Standard Series cores and with full designer configurability with the Xtensa processor family. Tensilica's low-power, benchmark proven processors have been designed into high-volume products at industry leaders in the digital consumer, networking and telecommunications markets. All Tensilica processor cores are complete with a matching software development tool environment, portfolio of system simulation models, and hardware implementation tool support. For more information on Tensilica's patented approach to the creation of application-specific building blocks for SOC design, visit www.tensilica.com.
-- Tensilica and Xtensa are registered trademarks belonging to Tensilica Inc. All other company and product names are trademarks and/or registered trademarks of their respective owners.
-- Tensilica's announced licensees include ALPS, AMCC (JNI Corporation), Aquantia, Astute Networks, Atheros, ATI, Avago Technologies, Avision, Bay Microsystems, Berkeley Wireless Research Center, Broadcom, Cisco Systems, Conexant Systems, Cypress, Crimson Microsystems, ETRI, FUJIFILM Microdevices, Fujitsu Ltd., Hudson Soft, Hughes Network Systems, Ikanos Communications, LG Electronics, Lucid Information Technology, Marvell, MediaWorks, NEC Laboratories America, NEC Corporation, NetEffect, Neterion, Nippon Telephone and Telegraph (NTT), NVIDIA, Olympus Optical Co. Ltd., sci-worx, Seiko Epson, Solid State Systems, Sony, STMicroelectronics, Stretch, TranSwitch Corporation, u-Nav Microelectronics and Victor Company of Japan (JVC).
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