Intellitech to present patented Concurrent JTAG technology at ITC this week
Durham, NH October 26, 2004 - “Testing from Fab to Field” is this year’s theme at the International Test Conference, (www.itctestweek.org), in Charlotte, NC, USA. At Intellitech, we are of course, pleased that this year’s theme matches Intellitech’s unified test strategy for the last six years of testing from “Silicon to Systems”. While ATE vendors have promoted IEEE 1149.1 as a test �add-on’ for in-circuit test, Intellitech has innovated test strategies to enable testing, debug and configuration using this standard from “Fab to Field”. Only Intellitech provides this comprehensive approach.
Join Intellitech on Wednesday October 27th at 1:30PM, Session 31.1 A Codeless BIST Processor for Embedded Test and In-System Configuration of Boards and Systems By CJ. Clark and Mike Ricchetti. This technical paper describes the benefits of the industry’s #1 embedded test and FPGA configuration processor.
Intellitech will also have a corporate presentation on “CJTAG” - Concurrent JTAG - Intellitech’s patented and patent-pending enhancement to 1149.1 for concurrent test, flash and FPGA programming. Wednesday at 5:00PM session C4.3. The title is “Parallel 1149.1—What Is It and How Does It Affect Test/Configuration of ICs, PCBs and Systems?”
Intellitech’s CEO CJ Clark has been invited to provide the opening keynote for the Electronic System Test Workshop. The trend today is to implement a test and configuration infrastructures at the system level. This keynote explores the shift from a pure software/functional system test approach to a structured test approach for systems. The Keynote for the EST Workshop is Thursday, October 28th at 4:30PM entitled “Using IC test strategies for System Test”.
Please also visit us during the exhibition at Booth #1411 for demonstrations of SystemBIST, Concurrent JTAG, our patented on-board FLASH programming, NEBULA silicon debugger and our award winning PT100 Parallel Tester.
Intellitech's TEST-IPTM family provides patented and patent-pending infrastructure IP that enables customers to lower the cost of designing, debugging, producing and maintaining electronic systems. Intellitech's proprietary solutions enable customers to build self-testable and in-the-field re-configurable products with the least amount of engineering resources and at the lowest cost. Intellitech lowers production costs by embedding test or enabling parallel test of electronic assemblies during production test and burn-in. The unified test and configuration approach enables customers to lower manufacturing test costs, provide field adaptable products and retard product obsolescence with field upgrade-able logic.
The TEST-IP Intellectual Property is coupled with the Eclipse Scan-Based Diagnostic and Test tools to provide a powerful combination software-hardware tools for automatic test pattern generation, debug, and validation prior to embedding test and configuration data into the customer's product or passing to the PT100 production tester.
Intellitech Corp. is focused on providing a complete customer solution early during the design phase that ensures success. The engineering and support team is dedicated only to providing a comprehensive low cost configuration and test strategy for the entire product. Over the years, the company has been successful in being the first-to-market and driving major technology changes in IEEE 1149.1 based configuration, debug and test. Intellitech’s PT100 Parallel Tester received the prestigious Test and Measurement World Editor’s Best-in-Test 2004 award.
Intellitech's customer base ranges from companies providing the latest networking products to ATE companies providing cutting edge semiconductor testers, from semiconductor manufacturers to space related companies providing satellites to large computer companies delivering multi-processor systems. The company's broad product selection, strong support team, and compelling value proposition have resulted in solid profitability and a strong balance sheet.