SUNNYVALE, CA--(Marketwired - September 30, 2014) - Real Intent, Inc., a leading provider of EDA RTL sign-off verification solutions, today announced the 2014 release of its Meridian CDC product for comprehensive clock domain crossing (CDC) analysis. This new software release adds enhanced speed, analysis and debug support, boosting productivity for SoC and FPGA design teams. It introduces a whole new CDC interface approach, a new way of debugging CDC violations, and a unique way to handle flat and hierarchical designs comprehensively. It also maintains Real Intent's product leadership in delivering what the company believes is the industry's fastest-performance, highest-capacity and most precise CDC solution in the market.
New Meridian CDC enhancements and updates include:
- The first release of Meridian iDebug, Real Intent's new state-of-the-art design intent debugger and data manager; its intelligent hierarchical analysis of design intent makes finding subtle clock-domain crossings easy and efficient
- 30-percent faster performance and 40-percent better capacity than the previous release for flat analysis of SoC and FPGA designs
- An optimized "bottom-up" verification flow that provides hierarchical CDC reporting and sign-off management for giga-scale designs
- Easier design setup that enhances analysis precision and reporting clarity for faster sign-off
- Broader SDC design constraint support for a wider set of design types
- A new formal analysis engine with up to 10X faster speed than the previous version and greater coverage to find hidden CDC problems
Meridian CDC performs comprehensive structural and functional analysis to ensure that signals crossing asynchronous clock domains on ASIC or FPGA devices are received reliably. With a giga-scale capacity, Meridian CDC is the only solution that enables all aspects of CDC sign-off. It excels in speed and low-noise analysis of SoC designs, and includes a formal engine that uncovers hidden CDC issues.
The new iDebug debugger in Meridian CDC is the first to employ a full database that captures all phases of CDC verification for the intelligent hierarchical analysis of design intent. It distinguishes the root cause for issues, and minimizes iterations and debug time through an easy-to-use programmable graphical interface. With its powerful command-line interface, iDebug supports a fully customizable sign-off methodology that can be tailored for any design-flow. It also eliminates all data compromises, resulting in the most efficient debug process.
Illustration of customized reporting by Real Intent iDebug for clock domain crossing warnings.
Graham Bell, vice-president of marketing at Real Intent, said, "Real Intent is delivering the next major innovation in CDC technology with our new hierarchical CDC flow built on our Meridian architecture -- a brand new way to debug CDC violations. With the largest flat capacity of any tool in the industry, hierarchical reporting and sign-off management, Meridian CDC lets designers achieve giga-gate capacity verification without sacrificing precision. The flow avoids the compromises found with abstract-modeling and the use of waivers in other products. Our new iDebug debug manager dramatically expands designers' capability to analyze and manage reports from the CDC analysis database. iDebug's extensive set of features in its graphical and command-line interfaces will bring new levels of productivity to design teams everywhere." For additional comments about the new version of Meridian CDC, please click here to watch a video interview with Ramesh Dewangan, vice-president of application engineering at Real Intent.
The new release of Meridian CDC is available in November 2014. Pricing depends on product configuration. For more information, please email Email Contact.
About Real Intent
Companies worldwide rely on Real Intent's EDA software to accelerate functional verification and advanced sign-off of electronic designs. The company provides comprehensive CDC verification, advanced RTL analysis and sign-off solutions to eliminate complex failure modes of SoCs. Real Intent's Meridian and Ascent product families lead the market in performance, capacity, accuracy and completeness. Please visit www.realintent.com for more information.
|ASIC:||Application-Specific Integrated Circuit|
|CDC:||Clock Domain Crossing|
|EDA:||Electronic Design Automation|
|FPGA:||Field-Programmable Gate Array|
|RTL:||Register Transfer Level|
|SDC:||Synopsys Design Constraints|
Real Intent and the Real Intent logo are registered trademarks, and Ascent, Meridian and iDebug are trademarks of Real Intent, Inc. All other trademarks and trade names are the property of their respective owners.