WinterLogic Announces Inspect Fault Analysis Tool

Roseville, MN, May 22, 2014 -- WinterLogic, Inc., the industry leader in fault simulation solutions, today announced the release of Z01X 2.8 with Inspect, a graphic interface tool designed for exploring the quality of a design’s test coverage. Leveraging over twenty years of experience in fault simulation technology, Inspect combines a flexible suite of analysis tools with Z01X’s powerful fault simulation platform to provide an advanced environment for investigating fault coverage.

“As designs continue to increase in complexity, debug and analysis tools like Inspect represent our continued commitment to advancing fault simulation technology,” states Jason Campbell, WinterLogic’s President. “Inspect’s linked viewers for source code, hierarchies and fault definitions enable quick identification of poorly tested areas in complex designs.”

“We are really excited about this new capability. Our customers who perform extensive RTL or gate-level fault simulation now have a unique platform to efficiently develop better test vectors. Visualization of faults in the context of surrounding logic provides useful feedback for functional, BIST and diagnostic patterns,” says Olivier Bolon, Winterlogic’s director of Sales and Business Development.

WinterLogic’s Z01X is the only commercial fault simulator with the capacity and performance to successfully run the largest SoC for wireless, graphics and computing. With its advanced feature set, WinterLogic’s Z01X is the tool of choice for meeting the most stringent automotive manufacturing and safety standards such as AEC-Q100 and ISO26262. Z01X 2.8 adds not only the Inspect fault analysis tool, but also continued enhancements to SystemVerilog support, 2X RTL simulation performance improvements, and a new TCL scripting interface.

About WinterLogic
WinterLogic provides fault simulation products that analyze a test suite’s ability to detect manufacturing defects and design errors. Z01X for Manufacturing Assurance helps companies hit their zero-defect manufacturing target and reduce testing costs by selecting the most effective tests and closing the ATPG coverage gap. Z01X for Verification Assurance uses functional fault simulation to quickly identify untested areas in RTL designs and weaknesses in verification test suites. 

Contact: 
Jason Campbell
WinterLogic, Inc.
651-633-4645
Email Contact

 




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