In order to fulfill their test plan, most verification engineers have coverage targets to meet. In practice it is generally not a problem to reach 90% structural coverage, but it often turns out to be a real burden to find stimuli that trigger the remaining uncovered areas. Meeting the coverage goals can hence be a painful and time-consuming task. Moreover, setting a coverage target questions how coverage is measured. A coverage-driven verification methodology strongly relies on the correctness of coverage measurement. Accuracy is therefore critical to set reachable coverage goals and insure convergence of random or pseudo-random tests.
At DAC, TransEDA will be introducing a Coverability Analysis option to its best selling VN-Cover Coverage Analysis product. Coverability is a unique solution to TransEDA that improves coverage measurement accuracy and helps engineers to easily increase design coverage, thus saving days of work.
Coverability Analysis Option
"The ultimate goal for designers is to get 100% coverage. TransEDA has a unique solution to this problem by integrating formal techniques into our leading coverage tool", says Modesto Casas, responsible for Worldwide Marketing at TransEDA. "Where standard code coverage passively tells designers what is covered, our Coverability Analysis option actively guides them on how to reach full coverage using their existing design environment and without having to integrate multiple vendors' tools nor needing formal verification knowledge."
Coverability is a methodology that guides the designer on the shortest path to full coverage, filtering out unreachable design parts. Coverability Analysis enables users to check if the uncovered branches are reachable or not. If so, a VCD trace is provided to illustrate a possible scenario to cover each given branch. If part of the RTL is proven unreachable, the data provided by VN-Cover is updated to highlight uncoverable code and to feed back refined coverage ratio, thereby increasing coverage accuracy.
Coverability Analysis is fully integrated into VN-Cover, running automatically either on all remaining uncovered branches or on specific ones selected by the user via the GUI. Using the VN-Cover Coverability Analysis option, engineers can easily increase design coverage, thus saving days of work, without requiring prior experience with property checkers.
"We're very proud to announce this new Coverability Analysis option to VN-Cover at DAC 2004.", says Jean-Luc Bouvresse, C.E.O. of TransEDA. "Coverability Analysis is an important accomplishment resulting from the synergy between TransEDA's well established coverage products and TNI-Valiosys' formal verification techniques. This new solution is a direct result of the success of our merger."
"I'm very happy to provide our customers with the new functionality we promised them at DATE earlier this year.", continues Jean-Luc Bouvresse. "The VN-Cover Coverability Analysis option will have a direct and extremely positive impact on the efficiency of our customers during the verification phase, and will help them complete their projects with the highest level of confidence."
About VN-Cover Coverability Analysis Option
To increase coverage-driven verification effectiveness even further, unexercisable parts of the HDL code have to be filtered out to prevent erroneous analysis failures being reported and therefore improve coverage measurement accuracy.
The VN-Cover Coverability Analysis option has been developed to guide the user in this complex task. This option automatically deploys formal techniques to check for reachability of any uncovered parts of the code, either globally or on user-selected points. When uncoverable HDL parts have been found, they are highlighted and coverage ratios are updated. For points found to be coverable, the tool outputs a VCD trace and a test bench illustrating possible coverage scenarios.
Coverability Analysis is available now as an option to VN-Cover. North America and Europe price for this option is $15,000. For more information, contact your local representative or visit www.transeda.com.
TransEDA is a leader in coverage and ready-to-use verification solutions for electronic designs. The company has over ten years of operating experience in the EDA market. In October 2003, TransEDA joined forced with TNI-Valiosys, a formal verification and validation solutions supplier, to provide customers with a predictable, structured verification environment.
TransEDA delivers advanced solutions for Coverage Analysis on simulation and emulation platforms with Coverability Analysis capability, Specification Coverage and Impact Analysis, Configurable HDL Checking, Static and Dynamic Property Checking, Automatic Bus Protocol Coverage, PCI Express Verification, Application Specific Test Automation, Test Suite Optimization, and Transistor-level Functional Abstraction.
TransEDA is part of the Valiosys Group and has offices in North America, Europe and Japan, and local representatives in China, Korea and Taiwan. For more information, visit www.transeda.com.
For more information, please contact:
Marsha van den Heuvel
TransEDA Technology Ltd
Phone : + 33 (0)2 31 53 30 03
Email: Email Contact
TransEDA, the TransEDA logo, Verification from Concept to Reality, Verification Navigator and VN-Cover are registered trademarks of TransEDA Technology Inc. All other trademarks are the property of their respective holders.