Wokingham , UK – 18th November 2013. EnSilica, a leading independent provider of IC design services and system solutions, has launched a Constant False Alarm Rate (CFAR) soft IP core for use in situational awareness radar sensors for automotive driver-assist applications. The hardware accelerated CFAR IP is matched to EnSilica’s pipelined FFT IP core and, operating on continuous data at one bin per clock cycle, the combination of cores delivers a substantially reduced data set for analysis by the processor. The development of the CFAR IP also followed the guidelines necessary for integration with devices adhering to the ISO 26262 functional safety standard for road vehicles.
Situational radar sensors can be used in a wide variety of driver-assist applications such as advanced electronic stability control systems, pre-crash impact mitigation, blind spot and lane departure detection, and self-parking. 1D and 2D-CFAR is used in these applications to identify relevant objects or targets from the background clutter of a radar image and tag them for further processing. As driver-assist applications grow in complexity, the challenge is processing all the available data while recognising that a very large percentage of the field of view does not contain relevant objects. The EnSilica CFAR IP coupled with a 2K point FFT can calculate and search over 200,000 Fourier Transforms per second, reducing the radar image to a manageable number of possible objects that are critical to the driver safety.
The highly configurable EnSilica CFAR IP implements all the popular compute intensive algorithms, including GOSCA, GOSGO, GOSSO, CA, GOCA and GOSA, that would normally be applied in software and which involve real-time data transform, sorting and selection. The soft IP can be targeted for implementation in either FPGA or ASIC technologies to address a wide range of market segments.
“All-round vehicle radar is becoming a key component of future vehicle electronic control systems,” said Ian Lankshear, CEO of EnSilica. “The challenge is that it provides a massive amount of real-time data that has to be processed. The combination of our CFAR IP and pipelined FFT IP offloads this to hardware, resulting in extreme data reduction and predictable latency.”
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EnSilica is an established company with many years experience providing high quality IC design services to customers undertaking FPGA and ASIC designs. EnSilica has an impressive record of success working across many market segments with particular expertise in multimedia and communications applications. Customers range from start-ups to blue-chip companies. EnSilica can provide the full range of IC design services, from System Level Design, RTL coding and verification through to either a FPGA device or the physical design for ASIC designs. EnSilica also offers a portfolio of IP, including a highly configurable 16/32 bit embedded processor called eSi-RISC, the eSi-Comms range of communications IP, eSi-Connect range of processor peripherals and eSi-Crypto encryption IP. For further information about EnSilica, visit http://www.ensilica.com.