SAN JOSE, Calif. – October 28, 2013 – Calypto® Design Systems, Inc., the leader in technologies for ESL hardware design and RTL power optimization, announced it is demonstrating its Catapult®, PowerPro® and SLEC® products at the ARM® TechConTM 2013 Expo, at the Santa Clara Convention Center, Santa Clara, CA. Used by the world’s leading system and semiconductor companies, Calypto’s family of products enable ASIC, SOC and FPGA designers of today’s most innovative electronic products to quickly create fully-verified, power-optimized RTL for downstream synthesis and physical design.
Calypto will exhibit and provide demos for its Catapult, PowerPro and SLEC solutions. With the Catapult High-Level Synthesis products, designers have the option of using SystemC or C++ to dramatically shorten the design cycle by producing correct-by-construction, error-free, PPA optimized RTL. The PowerPro product line enables users to analyze both static and dynamic power usage at the RTL and either automatically or manually create power optimized RTL code that includes memory and leakage power optimization. The SLEC family of products formally verifies the complete RTL without the need for time consuming simulation and complex testbenches. The end result is dramatic reductions in time to market with up to 60% reduction in power usage.
Wednesday, October 30: 10:00 AM – 7:15 PM
Thursday, October 31: 10:00 AM – 4:00 PM
ARM® TechCon 2013, Santa Clara Convention Center - 5001 Great America Pkwy, Santa Clara, CA 95054. Calypto Booth #817.
The ARM® TechCon™ Expo is a unique opportunity for attendees to learn about technology solutions and innovations, identify cutting-edge technologies, and evaluate products side-by-side to help optimize designs and accelerate time-to-market launches. For details and registration visit: http://www.armtechcon.com/expo/
Calypto® Design Systems, Inc. is the leader in ESL hardware design and RTL power optimization. Calypto, whose customers include Fortune 500 companies worldwide, is a member of the ARM Connected Community, Cadence Connections program, the IEEE-SA, Synopsys System Verilog Catalyst Program, the Mentor Graphics OpenDoor program, and Si2. Calypto is an active participant in the Power Forward Initiative. Calypto has offices in Europe, India, Japan and North America.
Catapult, Calypto, PowerPro and SLEC are registered trademarks of Calypto Design Systems Inc.
All other trademarks are the property of their respective owners.