51st Design Automation Conference Issues Designer Track Call for Contributions

2014 tracks include front-end silicon design, back-end silicon design and embedded software and systems

LOUISVILLE, Colo. — (BUSINESS WIRE) — October 22, 2013The Design Automation Conference (DAC), the premier conference devoted to the design and automation of electronic systems, is pleased to announce its call for contributions for the 51st DAC Designer Track. This track is an exciting forum for design professionals to share their work with other experts. The Designer Track at DAC 2014 is sponsored by Apache Design, an ANSYS subsidiary. The 51st DAC will be held at the Moscone Convention Center in San Francisco, California, from June 1-5, 2014.

DAC is the yearly not-to-miss occasion for the worldwide community of system designers, system architects, IC designers, embedded system designers, validation engineers, CAD managers, and senior managers, executives, researchers and academics in the electronics field.

“The focus of the Designer Track is on the design tool user community,” said Designer Track co-chairs Karam Chatha of Qualcomm Research and Daniel Bourke of Cadence Design Systems. “While the regular DAC program is focused on algorithms, the Designer Track allows tool users to share challenges and benefits of different tools, flows, and methodologies. In addition, it provides excellent opportunities for education and networking between end users and tool developers.”

Submissions may describe the application of tools to the design of a novel electronic system or the integration of EDA tools within a design flow or methodology to produce such systems. A submission may be problem-specific in scope (e.g., hardware/software-based architecture exploration, analyzing substrate coupling during floorplanning) or may address a specific application domain (e.g., designing wireless handsets). The Designer Track differs from vendor-specific user forums in that it is not tied to a specific EDA vendor.

Technical Track

For the 2014 Technical Track, regular submissions (in the form of a slide presentation) will be accepted in the following categories:

  1. Front-end silicon design (FE): Front-end architecture, design and verification of current day system-on-chip (SoC) including major components such as CPU, GPU, and DSP. Front-end design of entire SoC sub-systems such as graphics, multimedia and modem.
  2. Back-end silicon design (BE): Back-end design and verification of current day SoC, major sub-systems and constituent components (CPU, GPU and DSP). Relevant topics include (but are not limited to) physical design, clock tree generation, timing closure, verification, and design rule checking.
  3. Embedded software and systems (ESS): Compilers (CPU, GPU, DSP) and programming aids, parallelizing tools, test and verification, operating system (including RTOS), virtual platform, virtual machines and run time environments.

Presentation and Poster Format

Based on Program Committee evaluation, Designer Track submissions may be accepted in either i) presentation and poster form, or ii) poster-only form. A Best Presentation award — based on both the quality of the submission and the DAC presentation itself — will be selected from the Designer Track presentations. Accepted Designer Track presentations and posters are not included in the DAC proceedings. However, accepted Designer Track submissions (both posters and presentation slides) will be made available on the DAC website after the conference as a part of the DAC Archives.

The submission site opens November 7, 2013 and the deadline for all Designer Track submissions is January 29, 2014. For additional submission information and deadlines, please visit www.dac.com under call for contributions.

About DAC

The Design Automation Conference (DAC) is recognized as the premier event for the design of electronic circuits and systems and for electronic design automation (EDA) and silicon solutions. Since 1964, a diverse worldwide community of many thousands of professionals has attended DAC. They include system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives as well as researchers and academicians from leading universities. Close to 60 technical sessions selected by a committee of electronic design experts offer information on recent developments and trends, management practices and new products, and methodologies and technologies. A highlight of DAC is its exhibition and suite area featuring leading and emerging EDA, silicon, intellectual property (IP) automotive, security and design services providers. The conference is sponsored by the Association for Computing Machinery (ACM), the Electronic Design Automation Consortium (EDA Consortium), and the Institute of Electrical and Electronics Engineers (IEEE), and is supported by ACM's Special Interest Group on Design Automation (ACM SIGDA).

Design Automation Conference acknowledges trademarks or registered trademarks of other organizations for their respective products and services.


Press Contact for DAC:
Michelle Clancy, 1-303-530-4334
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