Cadence Announces New Verification IP Models for Latest Memory Standards

SAN JOSE, CA -- (Marketwired) -- Aug 06, 2013 -- At MemCon 2013 today, Cadence Design Systems, Inc. (NASDAQ: CDNS), today announced the immediate availability of new verification IP (VIP) models for the latest memory standards -- LPDDR4, Wide I/O 2, eMMC 5.0, HMC and DDR4 LRDIMM.

Advanced features of these new models include trace debug, address scrambling and backdoor memory access. Additionally, the models support all leading third party simulators, verification languages and methodologies, enabling SoC designers to verify the correctness of interfaces to these new, specialized memories.

"Memory is playing an important role in the increased functionality and performance of mobile devices such as smartphones and tablets," said Mian Quddus, chairman of the JEDEC Board of Directors. "LPDDR4 and Wide I/O 2 are key new standards for memory interfaces, and the availability of memory models will allow designers to take advantage of these standards quickly."

"There's a new dynamic today in which designers are faced with more standards being introduced but with shorter lifecycles. At the same time, they need to address power, performance, cost, thermal and packaging constraints," said Martin Lund, senior vice president of Cadence's IP Group. "To address this, we are providing access to models supporting as many standards options as possible, so designers can get to market success as fast as possible."

About Cadence
Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available here.

© 2013 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence and the Cadence logo are registered trademarks of Cadence Design Systems, Inc. in the United States and other countries. All other trademarks are the property of their respective owners.

Add to Digg Bookmark with del.icio.us Add to Newsvine

For more information, please contact:
Dean Solov
Cadence Design Systems, Inc.
408-944-7226

Email Contact 





Review Article Be the first to review this article

SolidCAM - See it Live

Featured Video
Jobs
Body Structure Engineer (Entry Level) for HATCI at Superior Twp, California
GIS Specialist for Olsson Technology at Overland park, Kansas
GIS Specialist for ERDMAN at Madison, Wisconsin
Upcoming Events
Scilab Conference at Mozilla Paris 16 Bis Boulevard Montmartre Paris France - Nov 20, 2018
PI Marine 2018 at Hamburg Germany - Nov 27 - 28, 2018
2018 Simcenter Conference - Europe at Hilton Prague Pobrezni 1 Prague Czech Republic - Dec 3 - 5, 2018
Inside 3D Printing Mumbai 2018 at Nehru Centre Mumbai India - Dec 19 - 20, 2018
Kenesto: 30 day trial
MasterCAM



Internet Business Systems © 2018 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering EDACafe - Electronic Design Automation GISCafe - Geographical Information Services TechJobsCafe - Technical Jobs and Resumes ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise