Verific Design Automation Increases Revenue by 20% in 2012

Reputation for Quality and Reliable Software, Exceptional Customer Service Drive Success

ALAMEDA, CALIF. – January 28, 2013 – Verific Design Automation ( www.verific.com), provider of SystemVerilog, Verilog and VHDL parsers, ended 2012 with 52 active user companies and a revenue increase of 20% over 2011.

"Much of our business in 2012 came as a result of our reputation for quality parsers, reliable software, and excellent customer service, the hallmarks of our corporate culture," says Michiel Ligthart, Verific's president and chief operating officer. "EDA developers continue to select our parsers so that they can focus on their core competencies and get their products to market more efficiently."

In 2012, Verific signed six new licensed customers in a mix that includes both electronic design automation (EDA) companies and integrated device manufacturers (IDMs). Several existing customers added further software to their existing product mix.

Verific's software serves as the front end to a wide range of EDA and field programmable gate array (FPGA) tools for analysis, simulation, verification, synthesis, emulation and test of register transfer level (RTL) designs. The Verific Parser Platform includes support for SystemVerilog, Verilog, VHDL and UPF, and provides C++ and Perl application programming interfaces (APIs). Verific's software is distributed as C++ source code and compiles on all 32- and 64-bit Unix, Linux and Windows operating systems.

About Verific Design Automation
Verific Design Automation, with offices in Alameda, Calif., and Kolkata, India, provides parsers and elaborators for SystemVerilog, Verilog and VHDL. Verific's software is used worldwide by the EDA and semiconductor community in synthesis, simulation, formal verification, emulation, debugging, virtual prototyping, and design-for-test applications, which combined have shipped more than 40,000 copies. Corporate headquarters is located at: 1516 Oak Street, Suite 115, Alameda, Calif. 94501. Telephone: (510) 522-1555. Facsimile number: (510) 522-1553. Email: Email Contact. Website: www.verific.com.    




Review Article Be the first to review this article
Rand3D

Featured Video
MCAD Corporate Newsletter
rss feed
Jobs
Mechanical Design Engineer 3 for KLA-Tencor at Milpitas, CA
Geospatial Analyst - Senior for BAE Systems Intelligence & Security at Springfield, VA
Geospatial Systems Administrator for BAE Systems Intelligence & Security at arnold, MO
Urban Designer - Urban Design/Planning for SERA Architects, Inc at Portland, OR
Upcoming Events
ESPRIT World 2018 at Indianapolis Marriott Downtown 350 West Maryland Street Indianapolis IN - Jun 11 - 15, 2018
HxGN LIVE 2018 at The Venetian Las Vegas NV - Jun 12 - 15, 2018
IMTS2018 International Manufacturing Tech Show at McCormick Place Chicago IL - Sep 10 - 15, 2018
Kenesto: 30 day trial
SolidCAM: SolidCAM Dec 2017 Campaign Save 28 percent



Internet Business Systems © 2017 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering EDACafe - Electronic Design Automation GISCafe - Geographical Information Services TechJobsCafe - Technical Jobs and Resumes ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise