“TVS’ engineering team experienced an immediate productivity increase following training provided by dedicated Aldec support staff on the advanced debugging features available within Riviera-PRO framework,” said Mike Bartley, TVS CEO, “The positive synergy on the technical side and core values in general from both TVS and Aldec will help strive to deliver innovative, yet cost-effective verification solutions that increase designers productivity, under ever increasing workloads and budget constraints.”
“With increased complexity of designs, VIPs are becoming increasingly important for ASIC and FPGA verification. With TVS joining Aldec IP partner ecosystem, our customers benefit from immediate availability of numerous VIPs pre-validated with Aldec IEEE and OVM/UVM compliant tools,” said Dmitry Melnik, Aldec Product Manager, Riviera-PRO. “The relationship enables our customers to leverage the VIP with assurance of compliance within Riviera-PRO to complete their designs within budget and schedule.”
Test and Verification Solutions, Ltd. (TVS) delivers software test and hardware verification services to the semi-conductor industry and provides consultancy, training and execution services around the world. http://www.testandverification.com/
Aldec Inc., headquartered in Henderson, Nevada, is an industry leader in Electronic Design Verification and offers a patented technology suite including: RTL Design, RTL Simulators, Hardware-Assisted Verification, Design Rule Checking, IP Cores, DO-254 Functional Verification and Military/Aerospace solutions. www.aldec.com
Aldec is a registered trademark of Aldec, Inc. All other trademarks or registered trademarks are property of their respective owners.
Christina Toole, Aldec, Inc.
Dr Mike Bartley, TVS