Cadence Announces STMicroelectronics Has Taped Out 20-Nanometer Test Chip Using Cadence Tools

SAN JOSE, CA -- (Marketwire) -- May 31, 2012 -- Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced that it has contributed to STMicroelectronics having taped out a 20-nanometer test chip, incorporating custom analog and digital methodologies to enable mixed-signal SoC design at this advanced process node. Engineers from the two companies collaborated closely to develop technologies and deploy methodologies using the Cadence Encounter and Virtuoso platforms to enable design, implementation and signoff, in addition to development of foundational IP and a SKILL-based process design kit (PDK) for the 20-nanometer process.

This 20-nanometer tapeout marks an industry milestone for Cadence as the leader in delivering an end-to-end mixed-signal design flow for 20 nanometers. As part of this collaboration, STMicroelectronics has deployed the full Cadence® 20-nanometer flow, physical IP libraries and the related PDK.

"At 20 nanometers, custom analog IP creation and digital implementation are highly interdependent, and an optimal methodology must cover the custom analog and digital aspects of mixed-signal chip design, verification and implementation," said Dr. Chi-Ping Hsu, senior vice president, research and development, Silicon Realization Group at Cadence. "Working together over the past two years, Cadence and STMicroelectronics successfully deployed an efficient methodology and design automation to address the requirements for designing complex mixed-signal SoCs."

ST performed automated layout generation using Cadence Virtuoso® Layout Suite into STMicroelectronics' custom IP design development, including foundation IP, PLL and video DAC. To help ensure accurate results, designers used a 20-nanometer PDK that enables advanced capability such as Modgens, constraints and space-based routing. The Encounter® Digital Implementation (EDI) System provided 20-nanometer physical implementation capabilities for the tapeout, handling 20-nanometer process requirements during placement and optimization as well as routing.

"Our commitment to delivering mixed-signal SoC design capability at 20 nanometers required a collaboration partner that had deep knowledge in both analog and digital design methodology," said Philippe Magarshack, group vice president of Technology Research and Development at STMicroelectronics. "We selected Cadence at the start of our 20-nanometer development, and today's milestone demonstrates the success of that collaboration."

About Cadence
Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at www.cadence.com.

Cadence, Virtuoso, Encounter and the Cadence logo are registered trademarks of Cadence Design Systems, Inc. in the United States and other countries. All other trademarks are the property of their respective owners.

Add to Digg Bookmark with del.icio.us Add to Newsvine

For more information, please contact:
Dean Solov
Cadence Design Systems, Inc.
408-944-7226

Email Contact 





Review Article Be the first to review this article
Featured Video
Editorial
Jeff RoweJeff's MCAD Blogging
by Jeff Rowe
GE Additive’s Big Plans For Metal AM
Jobs
ECAD Designer - Data Connectivity for Delphi at Auburn Hills, MI
Mechanical Engineer II - Requisition ID 090445 for L3 Technologies at New York, NY
Estimator / Bidder for Rulon International at Saint Augustine, FL
Upcoming Events
33rd Annual Coordinate Metrology Society Conference at Snowbird UT - Jul 17 - 21, 2017
EMO Hannover 2017 at Hannover Germany - Sep 18 - 23, 2017
The 30th Annual Integrated Process Excellence Symposium & Training at Wyndham Grand Bonnet Creek Resort Orlando FL - Sep 18 - 20, 2017
Additive Manufacturing Conference 2017 at Knoxville Convention Center 701 Henley Street Knoxville TN - Oct 10 - 12, 2017



Internet Business Systems © 2017 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering EDACafe - Electronic Design Automation GISCafe - Geographical Information Services TechJobsCafe - Technical Jobs and Resumes ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy Advertise