Cadence Demonstrates the Power of Ecosystem Collaboration at ARM Technology Conference

SAN JOSE, CA -- (MARKET WIRE) -- Oct 20, 2011 -- Cadence Design Systems, Inc. (NASDAQ: CDNS)

WHO: Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, will showcase optimized solutions for ARM core-based designs with its system-to-silicon methodology at the ARM Technology Conference (ARM TechCon). Cadence is the Signature sponsor of this year's event.

WHAT: During the conference, Cadence highlights include the industry address, the fireside chat, numerous technical papers co-presented with customers and partners, and technology demonstrations in Cadence booths 29 (Silicon and SoC Realization technologies) and 500 (SoC and System Realization technologies). Samsung Electronics will join Cadence in booth 29 on Tuesday, October 25.

WHERE: The ARM Technology Conference will be held at the Santa Clara Convention Center, 5001 Great America Parkway, Santa Clara, Calif.

WHEN: The ARM Technology Conference will take place from October 25 to October 27, 2011.

Industry Address
Chi-Ping Hsu, senior vice president of Research and Development for Silicon Realization at Cadence will present the conference industry address, "Higher Stakes at Lower Technology Nodes," that describes how Cadence and ARM are collaborating to bring cutting-edge, advanced-node designs to market more efficiently.

This address will take place on Tuesday, October 25 from 9:30 a.m. to 10:15 a.m.

Cadence -- ARM Executive Fireside Chat
Lip-Bu Tan, president and chief executive officer, Cadence and Simon Segars, executive vice president and general manager, Physical IP Division, ARM will discuss how collaboration has become an essential ingredient of product innovation in the era of "apps-driven" multicore designs and 20nm implementation.

The chat will take place from 5:00 p.m. to 6:00 p.m. followed by a reception sponsored by Cadence at 6:00 p.m. to 7:00 p.m. in the Expo Hall.

The following Cadence papers have been selected by the conference organizers to be presented:

  • ARM nSTEP Microcontroller Implementation Using Cadence Silicon Realization Flows in Samsung 20nm Technology
    [ATC-101] Tuesday, October 25, 11:00 a.m.

  • Flow and Tools, Tips, and Tricks: Implementing Successful Cortex-A15-Based Designs
    [ATC-102] Tuesday, October 25, 11:00 a.m.

  • Early Architectural Planning for Increased Productivity, Predictability, and Profitability
    [ATC-105] Tuesday, October 25, 12 noon

  • Creating an Effective 32/28nm ARM SoC Design Methodology: Addressing Design Complexity, Timing Variability, and Silicon Manufacturability Challenges
    [ATC-114] Tuesday, October 25, 2:10 p.m.

  • DDR4, Higher Speeds, and Larger SoCs: Why External Memory Latency is Getting Worse, and What to do About It
    [ATC-118] Tuesday, October 25, 3:10 p.m.

  • Creation and Usage of SystemC Virtual Platforms for Multi-Core System Debugging and Analysis
    [ATC-302] Thursday, October 27, 11:00 a.m.

Cadence will sponsor a number of sessions at the conference including:

  • "Unified Flow for Mixed-Signal Design with an Embedded Cortex-M0"
    This session takes place on Tuesday, October 25 at 2:00 p.m. in room C.

  • "Verifying Your ACE-Based SoC: Will Tried and True Methods Hold Up?"
    This session takes place on Wednesday, October 26 at 3:30 p.m. in room H.

Cadence will also demonstrate its innovative Silicon, SoC, and System Realization technologies during the entire three-day conference at several booths in the Exhibit Hall.

A complete listing of Cadence participation at ARM TechCon can be found here.

About Cadence
Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at

Add to Digg Bookmark with Add to Newsvine

For more information, please contact:
Nancy Szymanski 
Cadence Design Systems, Inc.

Email Contact 

Review Article Be the first to review this article
IMTS 2018 Register Now>>

Featured Video
GIS Specialist for Metro Wastewater Reclamation District at Denver, Colorado
Upcoming Events
34th Annual Coordinate Metrology Society Conference 2018 at Grand Sierra Resort, 2500 East Second Street Meeting & Covention Center Reno NV - Jul 23 - 27, 2018
Design of Experiments (DOE) for Process Development and Validation (NTZ) 2018 at DoubleTree by Hilton San Diego Downtown 1646 Front St San Diego CA - Aug 2 - 3, 2018
FARO Measure And Inspect 2018 at Maple Hotel Bangkok Thailand - Aug 8, 2018
COMSOL Conference 2018 Bangalore at ITC Gardenia 1, Residency Road, Shanthala Nagar, Ashok Nagar, Bengaluru, Karnataka India - Aug 9 - 10, 2018
Kenesto: 30 day trial

Internet Business Systems © 2018 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering EDACafe - Electronic Design Automation GISCafe - Geographical Information Services TechJobsCafe - Technical Jobs and Resumes ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise