Power considerations in sub-micron digital CMOS

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[1] A. P. Chandrakasan, S. S. Sheng and R. Brodersen, "Low-power CMOS digital design", IEEE J. Solid-State Circuits, vol. 27, pp. 473-484, Apr.1992.

[2] E. A. Vittoz, "Low-power design: Ways to approach the limits", ISSCC 94, pp.14-18.

[3] E. A. Vittoz , "Low-power limitations and prospects in analog design", Advances In Analog Circuit Design Workshop, Eindhoven, Mar. 1994.

[4] R. Hogevorst, J. H. Huijsing, K. J. de Langen and R.G.H. Eschauzier, "Low-voltage low-power amplifiers", Advances In Analog Circuit Design Workshop, Eindhoven, Mar. 1994.

[5] R. Castello, F. Montecchi, F. Rezzi and A. Baschirotto, "Low voltage analog filters", IEEE Trans. Circuits Syst -I., vol.42, Nov. 1995 .

[6] G. Groenewold, "Optimal dynamic range integrators", IEEE Trans. Circuits Syst-I, vol.39, No.8, Aug. 1992.

[7] G. Groenewold, "Optimal dynamic range integrated continuous time filters", Delft University Press, ISBN 90-6275-755-3 / CIP , pp. 140-143, 1992.

[8] M. Yotsuyanagi, H. Hasegawa, M. Yamaguchi, M. Ishida and K. Sone, "A 2V, 10b, 20Msamples/s, mixed-mode subranging CMOS A/D converter", IEEE J. Solid-State Circuits, vol. 30., No. 12, Dec. 1995.

[9] B. Nauta, "Analog CMOS low-power design considerations", Low power-low voltage workshop at ESSCIRCí 96, Neuchatel-Switzerland, Sept. 1996.

[10] P. Kinget and M. Steyaert, "Analog VLSI integration of massive parallel signal processing systems", pp.21-45, Kluwer Academic Publishers, ISBN 0-7923-9823-8, 1997.

[11] Semiconductor Industry Association, "The National Technology Roadmap for

Semiconductors" 1997, pp. 46-47.

[12] M. Pelgrom, A. Duinmajer and A. Welbers, "Matching properties of MOS transistors", IEEE J. Solid-State Circuits, vol. 24., No. 5,pp. 1433-1439, 1989.

[13] A. Pavasovic, A.G. Andreou and C.R. Westgate, "Characterization of subthreshold MOS mismatch in transistors for VLSI systems", Analog Integrated Circuits and Signal Processing, no.6, pp.75-85, 1994.

[14] J. Bastos, M. Steyaert, R.Roovers, P. Kinget, W. Sansen, B. Graindourze, N. Pergoot and E. Janssens, "Mismatch characterisation of small size MOS transistors", in Proceedings of the IEEE International Conference on Microelectronic Test Structures, pp. 271-276, March 1995.

[15] J. Bastos, " Matching characterization for precision analog design", PhD thesis Katholieke Universiteit Leuven, Leuven, Belgium, 1996.

[16] B. Nauta and G.Hoogzaad, "How to deal with substrate noise in analog CMOS circuits", European Conference on Circuit Theory and Design, Budapest, September 1997.

[17] C. Enz, "Device modeling for low-voltage and low-current circuits" ,Advance engineering course on low-power/low-voltage IC design, pp.52-53, Lausanne, Switzerland, July, 1994.

[18] R.F. Wassenaar, "Analysis of analog CMOS circuits", PhD thesis, University of Twente, Enschede, 1996, ISBN 90-9009960-3.

[19] K.R. Laker and W.M.C. Sansen, "Design of analog integrated circuits and systems", McGraw-Hill, Inc., 1994, pp.692-695, ISBN 0-07-036060-X

[20] C.A. Gobet, "Spectral distribution of a sampled 1st-order lowpass filtered white noise", Electron. Lett., vol.45, no.1, pp.307-316, 1974.

[21] R. Castello, P.R. Gray, "Performance limitations in switched-Capacitor filters", IEEE Transactions on Circuits and Systems, Vol. CAS-32, no.9, Sept. 1985.

[22] C. Toumazou, J.B. Hughes and N.C. Battersby, "Switched-currents: an analogue technique for digital technology", IEE Peter Peregrinus Ltd.,1993, ISBN 0 863412947

[23] J.B. Hughes, I.C. Macbeth and D.M. Pattullo, "Switched-current filters", Proc. IEE, Pt. G, vol.137, pp. 156-162, April 1990.

[24] J.B. Hughes, I.C. Macbeth and D.M. Pattullo, "Second generation switched-current circuits", in Proc. IEEE International Symposium on Circuits and Systems, pp. 2805-2808, 1990.

[25] J.B. Hughes, I.C. Macbeth and D.M. Pattullo, "Switched-current system cells", in Proc. IEEE International Symposium on Circuits and Systems, pp. 303-306, 1990.

[26] J.B. Hughes, I.C. Macbeth and D.M. Pattullo, "New switched-current integrator", Electronics Letters, vol.26, pp.694-695,May, 1990.

[27] M. Pelgrom, "Low-power high-speed AD and DA conversion", in Low-power, low-voltage workshop (ESSCIRCí94), Sept. 1994.

[28] J. O. Voorman, Continuous Time Analog Integrated Filters in Y.P. Tsividis and J.O. Voorman, Integrated Continuous Time Filters. New York: IEEE press, 1993.

[29] B. Nauta, "A CMOS transconductance-C filter technique for very high frequencies", IEEE J. Solid-State Circuits, vol. 27, pp. 142-153, Feb. 1992.

[30] R. Castello, "Low-voltage SC and CT filters", Electronic Laboratories Advanced Engineering Course On Low-Power/Low-Voltage IC Design, Lausanne, June 1995.

[31] M. Steyaert, J. Crols, S. Gogaert, and W. Sansen, "Low-voltage analog CMOS filter design", IEEE Int. Symp. Circuits Syst. 1993, vol.2, pp.1447-1450, May 1993.

[32] Y. P. Tsividis, " Integrated continuous-time filter design-an overview", IEEE J. Solid-State Circuits, vol. 29, pp. 166-176, Mar. 1994.

[33] K.C. Smith and A. Sedra, "The current conveyor: A new circuit building block", Proc. IEEE, vol. 56, pp. 1368-1369, 1968.

[34] A. Sedra and K.C. Smith, " A second generation current conveyor and its applications", IEEE Trans. CT-17, pp. 132-134, 1970.

[35] R. H. Zele, D. J. Allstot and T. S. Fiez, "Fully balanced CMOS current-mode circuits", IEEE J. Solid-State Circuits, vol. 28, pp. 569-575, May 1993.

[36] S. L. Smith and E. Sanchez-Sinencio, "Low voltage integrators for high-frequency CMOS filters using current mode techniques", IEEE Trans. Circuits Syst-II, vol.43, No.1, pp. 39-48, Jan.1996.

[37] S. L. Smith and E. Sanchez-Sinencio, "3V high-frequency current-mode filters", Proc. Int. Symp. Circuits Syst., May, 1993, Chicago, IL. pp. 1459-1462.

[38] H.H. Rosenbrock, "State-Space and Multivariable Theory". Thomas Nelson and Sons LTD, London, 1970.



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