Last Edit July 22, 2001
The choices listed in Table 1-1 are available to the designer for whom
off-the-shelf and bit-slice microprogrammable architectures are not good
enough: full-custom arrays semi-custom arrays and simple-custom (gate)
Full Custom Arrays
If the bit-slice or off the shelf microprocessor solution is not adequate,
the next option may be a customized design. Full customization for an
application-specific design is not practical in individual components
at the SSI/MSI level. Instead, one or more custom semiconductors can be
designed that are specifically for and only for the application.
The customized VLSI chip may be totally designed by the customer - from
the design of the components present in the individual cells (resistors,
diodes, transistors, etc.) to the interconnect between these components
in one cell and other cells.
Table 1-1 Design Approach Comparisons
| 2-3 layers
|| 0 layers
|| faster (maybe)
|| smaller (maybe)
|longest design cycle
|| moderate design cycle
|| fastest design cycle
|most control over design
|| moderate controlover design
|| no control (fixed architecture)
All mask layers required to implement the full custom design must be
generated specific to the application. Prototype and debug must encompass
all layers. This approach will provide the smallest silicon and the most
optimum solution if the designer is experienced. It can be the
longest prototype time.
The key is the required expertise of the designer. The number of designers
that can successfully design a fully customized array is significantly
less than the designers that can successfully design an MSI/LSI PC board.
Depending on the manufacturer, a macro or standard cell library may exist
that can speed the design time if the cells and macros are suitable for
the application. The internal macro interconnects would still run through
all mask layers. Design time may be reduced at the cost of some flexibility,
but prototype time would remain lengthy. The advantage of the macro library
is to help the designer by providing common functions while lessening
the experience level required for a successful design.