The completion of routing finishes the ASIC physical design process. Routing is a complicated problem best divided into two steps: global and detailed routing. Global routing plans the wiring by finding the channels to be used for each path. There are differences between global routing for different types of ASICs, but the algorithms to find the shortest path are similar. Two main approaches to global routing are: one net at a time, or all nets at once. With the inclusion of timing-driven routing objectives, the routing problem becomes much harder and requires understanding the differences between finding the shortest net and finding the net with the shortest delay. Different types of detail routing include channel routing and area-based or maze routing. Detailed routing with two layers of metal is a fairly well understood problem.
The most important points in this chapter are:
Routing is divided into global and detailed routing.
Routing algorithms should match the placement algorithms.
Routing is not complete if there are unroutes.
Clock and power nets are handled as special cases.
Clock-net widths and power-bus widths must usually be set by hand.
DRC and LVS checks are needed before a design is complete.
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