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HDL Chip Design
Author: Smith, Douglas J.

Cover: Hard cover
Pages: 448
List Price: $65.00
Published by Doone Publications
Date Published: 06/1996
ISBN: 0965193438


This book is intended for practicing design engineers, their managers who need to gain a practical understanding of the issues involved when designing ASICs and FPGAs, and students alike.

The past 10 years has seen a dramatic change in the way digital design is performed. The need to reduce the time to market, the technology advancements and new innovative EDA software tools, have all helped to fuel this dramatic change. In terms of technology, transistors can be manufactured with submicron channel widths, resulting in reduced size (100 times smaller than the thickness of a human hair) and improved switching speed. This has lead to silicon chips containing a million transistors becoming common, and large complex systems being implemented within them. The need to be able to design chips of such size, in a timely manner, has lead to innovative EDA tools being developed with automatic synthesis tools being the major advancement. The introduction of commercial synthesis tools has enabled top down design methodologies to be adopted, starting with an abstract description of a circuit's behavior written in a hardware description language. More recently, the rate of change has slowed and the introduction of standards has enabled EDA tool vendors to develop integrated design tools and with far less risk.

There are two industry standard hardware description languages VHDL and Verilog, thanks to the efforts of the Vl (VHDL International) and OVI (open Verilog International). Both the Vl and OVI are industry consortiums of design tool vendors, chip vendors, users (designers) and academia. The Vl succeeded in establishing VHDL as an IEEE standard (IEEE 1076) first in 1987 and revised it in 1993 (IEEE 1076-1993). The second to become a standard was Verilog. The OVI established Verilog as an IEEE standard in 1995 (IEEE 1364-1995). Although Verilog became an IEEE standard after VHDL, it has been used by digital designers for far longer.

The benefits of adopting a top-down design methodology, adhering to the use of these standards is that, 1) design source files are transportable between different EDA tools and, 2) the design is independent of any particular silicon vendor's manufacturing process technology.

The emphasis of this book is on digital design using such standards.